From patchwork Tue Oct  6 17:45:57 2009
Content-Type: text/plain; charset="utf-8"
MIME-Version: 1.0
Content-Transfer-Encoding: 8bit
Subject: Boot issues (CBFS?) on VIA pc2500e
Date: Tue, 06 Oct 2009 17:45:57 -0000
From: Myles Watson <mylesgw@gmail.com>
X-Patchwork-Id: 352
Message-Id: <2831fecf0910061045v37a0ce3wef8724955b79249c@mail.gmail.com>
To: Uwe Hermann <uwe@hermann-uwe.de>
Cc: Stefan Reinauer <stepan@coresystems.de>, coreboot@coreboot.org

>> >> Wrote the mp table end at: 000f0410 - 000f0568
>> >> Wrote the mp table end at: 1fff0410 - 2001040e
>> >>
>> > Writing high tables above RAM!  Why is the high MP table so much larger than
>> > the low one?
>> >
>> >
>>
>> Right! Good spotting... something is reaaaally fishy here... Almost 64k
>> mp table vs 300 bytes.

> I bisected this, the commit that broke the board was r4238, where high
> tables support was added. Disabling it in
> src/northbridge/cn700/Config.lb results in a successful boot into FILO.
>
> Not sure what the correct fix for working high tables support for this
> board/chipset is.
Uwe,

Could you try this patch so we can narrow down where the problem is?

Thanks,
Myles


Index: svn/src/mainboard/via/pc2500e/mptable.c
===================================================================
--- svn.orig/src/mainboard/via/pc2500e/mptable.c
+++ svn/src/mainboard/via/pc2500e/mptable.c
@@ -59,8 +59,12 @@ void *smp_write_config_table(void *v)
 	mc->mpe_checksum = 0;
 	mc->reserved = 0;
 
+	printk_debug("0: entries %d, mpc_length %ld, mpe_length %ld\n",
+		     mc->mpc_entry_count, mc->mpc_length, mc->mpe_length);
 	smp_write_processors(mc);
 
+	printk_debug("1: entries %d, mpc_length %ld, mpe_length %ld\n",
+		     mc->mpc_entry_count, mc->mpc_length, mc->mpe_length);
 
 /* Bus:		Bus ID	Type*/
 	/* define numbers for pci and isa bus */
@@ -69,16 +73,22 @@ void *smp_write_config_table(void *v)
 	}
 	smp_write_bus(mc, bus_isa, "ISA   ");
 
+	printk_debug("2: entries %d, mpc_length %ld, mpe_length %ld\n",
+		     mc->mpc_entry_count, mc->mpc_length, mc->mpe_length);
 
 /* I/O APICs:	APIC ID	Version	State		Address*/
 	smp_write_ioapic(mc, VT8237R_APIC_ID, 0x20, VT8237R_APIC_BASE);
 
+	printk_debug("3: entries %d, mpc_length %ld, mpe_length %ld\n",
+		     mc->mpc_entry_count, mc->mpc_length, mc->mpe_length);
 	/* Now, assemble the table. */
 
 	smp_write_intsrc(mc, mp_ExtINT,
 			 MP_IRQ_TRIGGER_EDGE | MP_IRQ_POLARITY_HIGH,
 			 bus_isa, 0x0, VT8237R_APIC_ID, 0x0);
 
+	printk_debug("4: entries %d, mpc_length %ld, mpe_length %ld\n",
+		     mc->mpc_entry_count, mc->mpc_length, mc->mpe_length);
 #define ISA_INT(intr, pin) \
 	smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, \
 		bus_isa, (intr), VT8237R_APIC_ID, (pin))
@@ -98,6 +108,8 @@ void *smp_write_config_table(void *v)
 	ISA_INT(0xe, 0xe);
 	ISA_INT(0xf, 0xf);
 
+	printk_debug("5: entries %d, mpc_length %ld, mpe_length %ld\n",
+		     mc->mpc_entry_count, mc->mpc_length, mc->mpe_length);
 #define PCI_INT(bus, dev, fn, pin) \
 	smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, \
 		bus, (((dev)<<2)|(fn)), VT8237R_APIC_ID, (pin))
@@ -132,6 +144,8 @@ void *smp_write_config_table(void *v)
 	/* Onboard VGA */
 	PCI_INT(1, 0, 0, 16);
 
+	printk_debug("6: entries %d, mpc_length %ld, mpe_length %ld\n",
+		     mc->mpc_entry_count, mc->mpc_length, mc->mpe_length);
 /*Local Ints:	Type	Polarity    Trigger	Bus ID	 IRQ	APIC ID	PIN#*/
 	smp_write_lintsrc(mc, mp_ExtINT,
 			 MP_IRQ_TRIGGER_DEFAULT | MP_IRQ_POLARITY_DEFAULT,
@@ -139,6 +153,8 @@ void *smp_write_config_table(void *v)
 	smp_write_lintsrc(mc, mp_NMI,
 			 MP_IRQ_TRIGGER_DEFAULT | MP_IRQ_POLARITY_DEFAULT,
 			 0, 0x0, MP_APIC_ALL, 0x1);
+	printk_debug("7: entries %d, mpc_length %ld, mpe_length %ld\n",
+		     mc->mpc_entry_count, mc->mpc_length, mc->mpe_length);
 
 	/* There is no extension information... */