Patchwork device tree de-duplication

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Submitter Myles Watson
Date 2009-10-06 19:52:51
Message ID <2831fecf0910061252y707571c7ha24f095b6887c160@mail.gmail.com>
Download mbox | patch
Permalink /patch/354/
State Rejected
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Comments

Myles Watson - 2009-10-06 19:52:51
I don't think we should have two copies of the device tree.  I removed
the second copy in Tyan s289x boards.  I also removed rom_address
statements that were pre-CBFS.  Abuild tested.

Signed-off-by: Myles Watson <mylesgw@gmail.com>

Thanks,
Myles
Patrick Georgi - 2009-10-06 20:31:56
Am Dienstag, den 06.10.2009, 13:52 -0600 schrieb Myles Watson:
> I don't think we should have two copies of the device tree.  I removed
> the second copy in Tyan s289x boards.  I also removed rom_address
> statements that were pre-CBFS.  Abuild tested.
I think the original idea why this wasn't done is to allow sconfig to
develop from there. But I hope we'll get this switch done quick enough
that sconfig changes can wait until newconfig is gone...

> Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Patrick Georgi <patrick.georgi@coresystems.de>
Myles Watson - 2009-10-06 20:37:36
On Tue, Oct 6, 2009 at 2:31 PM, Patrick Georgi <patrick@georgi-clan.de> wrote:
> Am Dienstag, den 06.10.2009, 13:52 -0600 schrieb Myles Watson:
>> I don't think we should have two copies of the device tree.  I removed
>> the second copy in Tyan s289x boards.  I also removed rom_address
>> statements that were pre-CBFS.  Abuild tested.
> I think the original idea why this wasn't done is to allow sconfig to
> develop from there.
I'm letting my ignorance show again.  I don't know anything about sconfig.

> But I hope we'll get this switch done quick enough
> that sconfig changes can wait until newconfig is gone...
That would be nice.

>> Signed-off-by: Myles Watson <mylesgw@gmail.com>
> Acked-by: Patrick Georgi <patrick.georgi@coresystems.de>
Rev 4727.
Thanks,
Myles
Patrick Georgi - 2009-10-06 20:40:10
Am Dienstag, den 06.10.2009, 14:37 -0600 schrieb Myles Watson:
> I'm letting my ignorance show again.  I don't know anything about sconfig.
sconfig is newconfig minus the Makefile generation code. what remains is
the part of newconfig that parses the device tree and creates the C
representation of it, etc.

Eventually, I'll rewrite it in C, to remove the python dependency, but
for now, it's quite similar to newconfig - just with lots of stuff
removed. (Thank you, Ron!)


Patrick
ron minnich - 2009-10-06 20:46:09
I don't recommend doing this but it's done.

But until we kill newconfig, with this change, we've locked sconfig
into supporting the newconfig tree grammar. If we fix or improve
things for devicetree.cb we stand a change of breaking builds based on
newconfig.

So, in future, if we change the new tree grammar for some reason, we
stand a chance of breaking abuild.

If we're going to do something like this change I'd prefer just
removing Config.lb and Options.lb.

ron
Patrick Georgi - 2009-10-06 20:53:34
Am Dienstag, den 06.10.2009, 13:46 -0700 schrieb ron minnich:
> So, in future, if we change the new tree grammar for some reason, we
> stand a chance of breaking abuild.
Future? We got >50% of all boards in kconfig (but not verified to work,
that will have to happen over time). I intend to do the rest soon, and
improve the chances of things working out of the box (by comparing
configuration variables).

What's to stop us from dropping newconfig at that time (talking days and
weeks, not months)? I think we should be able to restrain us from
improving the device tree syntax for a while longer ;)


Patrick
ron minnich - 2009-10-06 20:55:51
On Tue, Oct 6, 2009 at 1:53 PM, Patrick Georgi <patrick@georgi-clan.de> wrote:

> What's to stop us from dropping newconfig at that time (talking days and
> weeks, not months)? I think we should be able to restrain us from
> improving the device tree syntax for a while longer ;)

built is one thing, tested another.

I'm still all for dropping Config.lb when a target is known to work.
And killing newconfig is fine with me any time.

ron
Myles Watson - 2009-10-06 20:56:17
> I don't recommend doing this but it's done.
It's easily reverted.

> But until we kill newconfig, with this change, we've locked sconfig
> into supporting the newconfig tree grammar. If we fix or improve
> things for devicetree.cb we stand a change of breaking builds based on
> newconfig.
My opinion is that we have too many things up in the air.  When Patrick is
trying to figure out differences between Kconfig and newconfig, the last
thing he needs is a devicetree.cb that has been modified from the Config.lb
breaking things.
 
> So, in future, if we change the new tree grammar for some reason, we
> stand a chance of breaking abuild.
I thought the idea was to switch over to kbuildall before we made other
major changes.  Otherwise we have too many things to test.  For example the
s2881 that used to work.

> If we're going to do something like this change I'd prefer just
> removing Config.lb and Options.lb.
That seems one step more drastic than what I did.

Thanks,
Myles
Carl-Daniel Hailfinger - 2009-10-06 21:20:06
On 06.10.2009 22:56, Myles Watson wrote:
>> I don't recommend doing this but it's done.
>>     
> It's easily reverted.
>   

I'm happy with the change.


>> But until we kill newconfig, with this change, we've locked sconfig
>> into supporting the newconfig tree grammar. If we fix or improve
>> things for devicetree.cb we stand a change of breaking builds based on
>> newconfig.
>>     
> My opinion is that we have too many things up in the air.  When Patrick is
> trying to figure out differences between Kconfig and newconfig, the last
> thing he needs is a devicetree.cb that has been modified from the Config.lb
> breaking things.
>   

In German there is a proverb about having too many construction sites
at once. I'm happy that the CBFS conversion seems to be done, and the
ongoing Kconfig work is also awesome. Taking into account that new boards
are ported every few weeks, it becomes clear that a new devicetree.cb
syntax is not something to develop right now.

Besides that, the v3 dts stuff was (and still is) awesome, and considering
that qemu people have been working on dts as well for their device model
stuff, we should seriously consider not reinventing devicetree structure
and syntax again.



>> So, in future, if we change the new tree grammar for some reason, we
>> stand a chance of breaking abuild.
>>     
> I thought the idea was to switch over to kbuildall before we made other
> major changes.  Otherwise we have too many things to test.  For example the
> s2881 that used to work.
>   

Yes, can we please at least try to keep those boards working (or restore
them to working state) which we can test? Moving infrastructure too fast
and breaking boards contributed to the waning interest in v3.


>> If we're going to do something like this change I'd prefer just
>> removing Config.lb and Options.lb.
>>     
> That seems one step more drastic than what I did.
>   

Once Kconfig works for all boards and kbuildall works for all boards,
why not? But before that... I am very afraid of repeating procedures
which may have had bad impact on v3.

Regards,
Carl-Daniel
Carl-Daniel Hailfinger - 2009-10-06 21:22:55
On 06.10.2009 22:40, Patrick Georgi wrote:
> sconfig is newconfig minus the Makefile generation code. what remains is
> the part of newconfig that parses the device tree and creates the C
> representation of it, etc.
>
> Eventually, I'll rewrite it in C, to remove the python dependency, but
> for now, it's quite similar to newconfig - just with lots of stuff
> removed.

Do we really want to throw away the design that went into dts by
rewriting the v2 sconfig?

If I misunderstood your intentions, please accept my apologies.

Regards,
Carl-Daniel
ron minnich - 2009-10-06 21:34:24
let's do one thing first. Let's not worry about what we might do in
future. You have all made the good point that we are juggling too many
chainsaws and flaming arrows and tigers. Let's land a few of those
before we worry about python removal/dts/whatever :-)

ron
Peter Stuge - 2009-10-06 23:10:26
ron minnich wrote:
> I'm still all for dropping Config.lb when a target is known to
> work.

I think that will hold up progress for quite some time. By progress
here I mean "having a single build system to minimize confusion".

Of course it would be great to have builds tested more now that there
are big changes going on - but I think it would be OK to break now
and fix later - or?


> And killing newconfig is fine with me any time.

Hm, isn't it needed for building from {Config,Options}.lb?


//Peter
Stefan Reinauer - 2009-10-06 23:12:07
Carl-Daniel Hailfinger wrote:
> On 06.10.2009 22:40, Patrick Georgi wrote:
>   
>> sconfig is newconfig minus the Makefile generation code. what remains is
>> the part of newconfig that parses the device tree and creates the C
>> representation of it, etc.
>>
>> Eventually, I'll rewrite it in C, to remove the python dependency, but
>> for now, it's quite similar to newconfig - just with lots of stuff
>> removed.
>>     
>
> Do we really want to throw away the design that went into dts by
> rewriting the v2 sconfig?
>   
DTS has no considerable advantages over the current sconfig, but it was
much more complicated.
I think we should stick to that format until we have something worthwhile.

I agree an sconfig version in C would make sense because right now on my
build host almost 50% of the build time goes into the configuration step.

When we're out of Kconfig + CBFS + Normal/Fallback firefighting mode, we
should reconsider our options here. Until then, every minute of work is
best spent on bringing over the remaining 50% of the mainboards to Kconfig.

Stefan

Patch

Index: svn/src/mainboard/tyan/s2895/Config.lb
===================================================================
--- svn.orig/src/mainboard/tyan/s2895/Config.lb
+++ svn/src/mainboard/tyan/s2895/Config.lb
@@ -143,177 +143,4 @@  end
 ##
 config chip.h
 
-# sample config for tyan/s2895
-chip northbridge/amd/amdk8/root_complex
-	device apic_cluster 0 on
-		chip cpu/amd/socket_940
-			device apic 0 on end
-		end
-	end
-	device pci_domain 0 on
-		chip northbridge/amd/amdk8 #mc0
-			device pci 18.0 on #  northbridge
-				#  devices on link 0, link 0 == LDT 0
-				chip southbridge/nvidia/ck804
-					device pci 0.0 on end   # HT
-					device pci 1.0 on # LPC
-						chip superio/smsc/lpc47b397
-							device pnp 2e.0 on #  Floppy
-								io 0x60 = 0x3f0
-								irq 0x70 = 6
-								drq 0x74 = 2
-							end
-							device pnp 2e.3 on #  Parallel Port
-								io 0x60 = 0x378
-								irq 0x70 = 7
-								drq 0x74 = 4
-							end
-							device pnp 2e.4 on #  Com1
-								io 0x60 = 0x3f8
-								irq 0x70 = 4
-							end
-							device pnp 2e.5 off #  Com2
-								io 0x60 = 0x2f8
-								irq 0x70 = 3
-							end
-							device pnp 2e.7 on #  Keyboard
-								io 0x60 = 0x60
-								io 0x62 = 0x64
-								irq 0x70 = 1
-								irq 0x72 = 12
-							end
-							device pnp 2e.8 on # HW Monitor
-								io 0x60 = 0x480
-								chip drivers/generic/generic # LM95221 CPU temp
-									device i2c 2b on end
-								end
-								chip drivers/generic/generic # EMCT03
-									device i2c 54 on end
-								end
-							end
-							device	pnp 2e.a on #  RT
-								io 0x60 = 0x400
-							end
-						end
-					end
-					device pci 1.1 on # SM 0
-						chip drivers/generic/generic #dimm 0-0-0
-							device i2c 50 on end
-						end
-						chip drivers/generic/generic #dimm 0-0-1
-							device i2c 51 on end
-						end
-						chip drivers/generic/generic #dimm 0-1-0
-							device i2c 52 on end
-						end
-						chip drivers/generic/generic #dimm 0-1-1
-							device i2c 53 on end
-						end
-						chip drivers/generic/generic #dimm 1-0-0
-							device i2c 54 on end
-						end
-						chip drivers/generic/generic #dimm 1-0-1
-							device i2c 55 on end
-						end
-						chip drivers/generic/generic #dimm 1-1-0
-							device i2c 56 on end
-						end
-						chip drivers/generic/generic #dimm 1-1-1
-							device i2c 57 on end
-						end
-					end # SM
-					device pci 1.1 on # SM 1
-						chip drivers/generic/generic #MAC EEPROM
-							device i2c 51 on end
-						end
-
-					end # SM
-					device pci 2.0 on end # USB 1.1
-					device pci 2.1 on end # USB 2
-					device pci 4.0 on end # ACI
-					device pci 4.1 off end # MCI
-					device pci 6.0 on end # IDE
-					device pci 7.0 on end # SATA 1
-					device pci 8.0 on end # SATA 0
-					device pci 9.0 on end # PCI
-					device pci a.0 on end # NIC
-		       			device pci b.0 off end # PCI E 3
-					device pci c.0 off end # PCI E 2
-					device pci d.0 off end # PCI E 1
-					device pci e.0 on end # PCI E 0
-					register "ide0_enable" = "1"
-					register "ide1_enable" = "1"
-					register "sata0_enable" = "1"
-					register "sata1_enable" = "1"
-#					register "nic_rom_address" = "0xfff80000" # 64k
-#					register "raid_rom_address" = "0xfff90000"
-					register "mac_eeprom_smbus" = "3" # 1: smbus under 2e.8, 2: SM0 3: SM1
-					register "mac_eeprom_addr" = "0x51"
-				end
-			end #  device pci 18.0
-			device pci 18.0 on end # Link 1
-			device pci 18.0 on
-			#  devices on link 2, link 2 == LDT 2
-				chip southbridge/amd/amd8131
-					# the on/off keyword is mandatory
-					device pci 0.0 on end
-					device pci 0.1 on end
-					device pci 1.0 on
-						chip drivers/pci/onboard
-							device pci 6.0 on end # lsi scsi
-							device pci 6.1 on end
-						end
-					end
-					device pci 1.1 on end
-				end
-			end # device pci 18.0
-			device pci 18.1 on end
-			device pci 18.2 on end
-			device pci 18.3 on end
-		end #mc0
-
-		chip northbridge/amd/amdk8
-			device pci 19.0 on #  northbridge
-				#  devices on link 0, link 0 == LDT 0
-				chip southbridge/nvidia/ck804
-					device pci 0.0 on end   # HT
-					device pci 1.0 on end   # LPC
-					device pci 1.1 off end # SM
-					device pci 2.0 off end # USB 1.1
-					device pci 2.1 off end # USB 2
-					device pci 4.0 off end # ACI
-					device pci 4.1 off end # MCI
-					device pci 6.0 off end # IDE
-					device pci 7.0 off end # SATA 1
-					device pci 8.0 off end # SATA 0
-					device pci 9.0 off end # PCI
-					device pci a.0 on end # NIC
-					device pci b.0 off end # PCI E 3
-					device pci c.0 off end # PCI E 2
-					device pci d.0 off end # PCI E 1
-					device pci e.0 on end # PCI E 0
-#					register "nic_rom_address" = "0xfff80000" # 64k
-					register "mac_eeprom_smbus" = "3"
-					register "mac_eeprom_addr" = "0x51"
-				end
-			end #  device pci 19.0
-
-			device pci 19.0 on end
-			device pci 19.0 on end
-			device pci 19.1 on end
-			device pci 19.2 on end
-			device pci 19.3 on end
-		end
-	end # PCI domain
-
-#	chip drivers/generic/debug
-#		device pnp 0.0 off end # chip name
-#		device pnp 0.1 off end # pci_regs_all
-#		device pnp 0.2 off end # mem
-#		device pnp 0.3 off end # cpuid
-#		device pnp 0.4 on  end # smbus_regs_all
-#		device pnp 0.5 off end # dual core msr
-#		device pnp 0.6 off end # cache size
-#		device pnp 0.7 off end # tsc
-#	end
-end # root_complex
+include devicetree.cb
Index: svn/src/mainboard/tyan/s2895/devicetree.cb
===================================================================
--- svn.orig/src/mainboard/tyan/s2895/devicetree.cb
+++ svn/src/mainboard/tyan/s2895/devicetree.cb
@@ -91,7 +91,7 @@  chip northbridge/amd/amdk8/root_complex
 					device pci 8.0 on end # SATA 0
 					device pci 9.0 on end # PCI
 					device pci a.0 on end # NIC
-		       			device pci b.0 off end # PCI E 3
+					device pci b.0 off end # PCI E 3
 					device pci c.0 off end # PCI E 2
 					device pci d.0 off end # PCI E 1
 					device pci e.0 on end # PCI E 0
@@ -99,8 +99,6 @@  chip northbridge/amd/amdk8/root_complex
 					register "ide1_enable" = "1"
 					register "sata0_enable" = "1"
 					register "sata1_enable" = "1"
-#					register "nic_rom_address" = "0xfff80000" # 64k
-#					register "raid_rom_address" = "0xfff90000"
 					register "mac_eeprom_smbus" = "3" # 1: smbus under 2e.8, 2: SM0 3: SM1
 					register "mac_eeprom_addr" = "0x51"
 				end
@@ -146,7 +144,6 @@  chip northbridge/amd/amdk8/root_complex
 					device pci c.0 off end # PCI E 2
 					device pci d.0 off end # PCI E 1
 					device pci e.0 on end # PCI E 0
-#					register "nic_rom_address" = "0xfff80000" # 64k
 					register "mac_eeprom_smbus" = "3"
 					register "mac_eeprom_addr" = "0x51"
 				end
Index: svn/src/mainboard/tyan/s2891/Config.lb
===================================================================
--- svn.orig/src/mainboard/tyan/s2891/Config.lb
+++ svn/src/mainboard/tyan/s2891/Config.lb
@@ -121,162 +121,4 @@  end
 ##
 config chip.h
 
-# sample config for tyan/s2891
-chip northbridge/amd/amdk8/root_complex
-	device apic_cluster 0 on
-		chip cpu/amd/socket_940
-			device apic 0 on end
-		end
-	end
-	device pci_domain 0 on
-		chip northbridge/amd/amdk8 #mc0
-			device pci 18.0 on #  northbridge
-				#  devices on link 0, link 0 == LDT 0
-				chip southbridge/nvidia/ck804
-					device pci 0.0 on end   # HT
-					device pci 1.0 on # LPC
-						chip superio/winbond/w83627hf
-							device pnp 2e.0 off #  Floppy
-								io 0x60 = 0x3f0
-								irq 0x70 = 6
-								drq 0x74 = 2
-							end
-							device pnp 2e.1 off #  Parallel Port
-								io 0x60 = 0x378
-								irq 0x70 = 7
-							end
-							device pnp 2e.2 on #  Com1
-								io 0x60 = 0x3f8
-								irq 0x70 = 4
-							end
-							device pnp 2e.3 off #  Com2
-								io 0x60 = 0x2f8
-								irq 0x70 = 3
-							end
-							device pnp 2e.5 on #  Keyboard
-								io 0x60 = 0x60
-								io 0x62 = 0x64
-								irq 0x70 = 1
-								irq 0x72 = 12
-							end
-							device pnp 2e.6 off #  CIR
-								io 0x60 = 0x100
-							end
-							device pnp 2e.7 off #  GAME_MIDI_GIPO1
-								io 0x60 = 0x220
-								io 0x62 = 0x300
-								irq 0x70 = 9
-							end
-							device pnp 2e.8 off end #  GPIO2
-							device pnp 2e.9 off end #  GPIO3
-							device pnp 2e.a off end #  ACPI
-							device pnp 2e.b off #  HW Monitor
-								io 0x60 = 0x290
-								irq 0x70 = 5
-							end
-						end
-					end
-					device pci 1.1 on # SM 0
-#						chip drivers/generic/generic #dimm 0-0-0
-#							device i2c 50 on end
-#						end
-#						chip drivers/generic/generic #dimm 0-0-1
-#							device i2c 51 on end
-#						end
-#						chip drivers/generic/generic #dimm 0-1-0
-#							device i2c 52 on end
-#						end
-#						chip drivers/generic/generic #dimm 0-1-1
-#							device i2c 53 on end
-#						end
-#						chip drivers/generic/generic #dimm 1-0-0
-#							device i2c 54 on end
-#						end
-#						chip drivers/generic/generic #dimm 1-0-1
-#							device i2c 55 on end
-#						end
-#						chip drivers/generic/generic #dimm 1-1-0
-#							device i2c 56 on end
-#						end
-#						chip drivers/generic/generic #dimm 1-1-1
-#							device i2c 57 on end
-#						end
-					end # SM
-#					device pci 1.1 on # SM 1
-#						chip drivers/i2c/adm1027 # ADT7463A CPU0 temp, SYS FAN 2/3/4
-#							device i2c 2d on end
-#						end
-#						chip drivers/i2c/adm1027 # ADT7463A CPU1 temp, CPU0/1 FAN , SYS FAN 1/5
-#							device i2c 2e on end
-#						end
-#						chip drivers/generic/generic # Winbond HWM 0x54 CPU0/1 VRM temp, SYSFAN 6/7, SB FAN
-#							device i2c 2a on end
-#						end
-#						chip drivers/generic/generic # Winbond HWM 0x92
-#							device i2c 49 on end
-#						end
-#						chip drivers/generic/generic # Winbond HWM 0x94
-#							device i2c 4a on end
-#						end
-#					end #SM
-					device pci 2.0 on end # USB 1.1
-					device pci 2.1 on end # USB 2
-					device pci 4.0 off end # ACI
-					device pci 4.1 off end # MCI
-					device pci 6.0 on end # IDE
-					device pci 7.0 on end # SATA 1
-					device pci 8.0 on end # SATA 0
-					device pci 9.0 on  # PCI
-					#	chip drivers/ati/ragexl
-						chip drivers/pci/onboard
-							device pci 7.0 on end
-							#register "rom_address" = "0xfff80000" #for 512K
-							register "rom_address" = "0xfff00000" #for 1M
-						end
-					end
-					device pci a.0 off end # NIC
-	       				device pci b.0 off end # PCI E 3
-					device pci c.0 off end # PCI E 2
-					device pci d.0 on end # PCI E 1
-					device pci e.0 on end # PCI E 0
-					register "ide0_enable" = "1"
-					register "ide1_enable" = "1"
-					register "sata0_enable" = "1"
-					register "sata1_enable" = "1"
-				end
-			end #  device pci 18.0
-			device pci 18.0 on end # Link 1
-			device pci 18.0 on
-			#  devices on link 2, link 2 == LDT 2
-				chip southbridge/amd/amd8131
-					# the on/off keyword is mandatory
-					device pci 0.0 on end
-					device pci 0.1 on end
-					device pci 1.0 on
-						chip drivers/pci/onboard
-							device pci 9.0 on end
-							device pci 9.1 on end
-						end
-					end
-					device pci 1.1 on end
-				end
-			end # device pci 18.0
-			device pci 18.1 on end
-			device pci 18.2 on end
-			device pci 18.3 on end
-		end #mc0
-
-	end # pci_domain
-
-#	chip drivers/generic/debug
-#		device pnp 0.0 off end # chip name
-#		device pnp 0.1 off end # pci_regs_all
-#		device pnp 0.2 off end # mem
-#		device pnp 0.3 off end # cpuid
-#		device pnp 0.4 off end # smbus_regs_all
-#		device pnp 0.5 off end # dual core msr
-#		device pnp 0.6 off end # cache size
-#		device pnp 0.7 off end # tsc
-#		device pnp 0.8 on  end # hard_reset
-#	end
-end # root_complex
+include devicetree.cb
Index: svn/src/mainboard/tyan/s2891/devicetree.cb
===================================================================
--- svn.orig/src/mainboard/tyan/s2891/devicetree.cb
+++ svn/src/mainboard/tyan/s2891/devicetree.cb
@@ -106,12 +106,10 @@  chip northbridge/amd/amdk8/root_complex
 					#	chip drivers/ati/ragexl
 						chip drivers/pci/onboard
 							device pci 7.0 on end
-							#register "rom_address" = "0xfff80000" #for 512K
-							register "rom_address" = "0xfff00000" #for 1M
 						end
 					end
 					device pci a.0 off end # NIC
-	       				device pci b.0 off end # PCI E 3
+					device pci b.0 off end # PCI E 3
 					device pci c.0 off end # PCI E 2
 					device pci d.0 on end # PCI E 1
 					device pci e.0 on end # PCI E 0
Index: svn/src/mainboard/tyan/s2892/Config.lb
===================================================================
--- svn.orig/src/mainboard/tyan/s2892/Config.lb
+++ svn/src/mainboard/tyan/s2892/Config.lb
@@ -122,162 +122,4 @@  end
 ##
 config chip.h
 
-# sample config for tyan/s2892
-chip northbridge/amd/amdk8/root_complex
-	device apic_cluster 0 on
-		chip cpu/amd/socket_940
-			device apic 0 on end
-		end
-	end
-	device pci_domain 0 on
-		chip northbridge/amd/amdk8 #mc0
-			device pci 18.0 on #  northbridge
-				#  devices on link 0, link 0 == LDT 0
-				chip southbridge/nvidia/ck804
-					device pci 0.0 on end   # HT
-					device pci 1.0 on # LPC
-						chip superio/winbond/w83627hf
-							device pnp 2e.0 on #  Floppy
-								io 0x60 = 0x3f0
-								irq 0x70 = 6
-								drq 0x74 = 2
-							end
-							device pnp 2e.1 on #  Parallel Port
-								io 0x60 = 0x378
-								irq 0x70 = 7
-								drq 0x74 = 3
-							end
-							device pnp 2e.2 on #  Com1
-								io 0x60 = 0x3f8
-								irq 0x70 = 4
-							end
-							device pnp 2e.3 off #  Com2
-								io 0x60 = 0x2f8
-								irq 0x70 = 3
-							end
-							device pnp 2e.5 on #  Keyboard
-								io 0x60 = 0x60
-								io 0x62 = 0x64
-								irq 0x70 = 1
-								irq 0x72 = 12
-							end
-							device pnp 2e.6 off #  CIR
-								io 0x60 = 0x100
-							end
-							device pnp 2e.7 off #  GAME_MIDI_GIPO1
-								io 0x60 = 0x220
-								io 0x62 = 0x300
-								irq 0x70 = 9
-							end
-							device pnp 2e.8 off end #  GPIO2
-							device pnp 2e.9 off end #  GPIO3
-							device pnp 2e.a off end #  ACPI
-							device pnp 2e.b on #  HW Monitor
-								io 0x60 = 0x290
-								irq 0x70 = 5
-							end
-						end
-					end
-					device pci 1.1 on # SM 0
-						chip drivers/generic/generic #dimm 0-0-0
-							device i2c 50 on end
-						end
-						chip drivers/generic/generic #dimm 0-0-1
-							device i2c 51 on end
-						end
-						chip drivers/generic/generic #dimm 0-1-0
-							device i2c 52 on end
-						end
-						chip drivers/generic/generic #dimm 0-1-1
-							device i2c 53 on end
-						end
-						chip drivers/generic/generic #dimm 1-0-0
-							device i2c 54 on end
-						end
-						chip drivers/generic/generic #dimm 1-0-1
-							device i2c 55 on end
-						end
-						chip drivers/generic/generic #dimm 1-1-0
-							device i2c 56 on end
-						end
-						chip drivers/generic/generic #dimm 1-1-1
-							device i2c 57 on end
-						end
-					end # SM
-					device pci 1.1 on # SM 1
-						chip drivers/i2c/adm1027 # ADT7463A CPU0 temp, SYS FAN 2/3/4
-							device i2c 2d on end
-						end
-						chip drivers/i2c/adm1027 # ADT7463A CPU1 temp, CPU0/1 FAN , SYS FAN 1/5
-							device i2c 2e on end
-						end
-						chip drivers/generic/generic # Winbond HWM 0x54 CPU0/1 VRM temp, SYSFAN 6/7, SB FAN
-							device i2c 2a on end
-						end
-						chip drivers/generic/generic # Winbond HWM 0x92
-							device i2c 49 on end
-						end
-						chip drivers/generic/generic # Winbond HWM 0x94
-							device i2c 4a on end
-						end
-					end #SM
-					device pci 2.0 on end # USB 1.1
-					device pci 2.1 on end # USB 2
-					device pci 4.0 off end # ACI
-					device pci 4.1 off end # MCI
-					device pci 6.0 on end # IDE
-					device pci 7.0 on end # SATA 1
-					device pci 8.0 on end # SATA 0
-					device pci 9.0 on  # PCI
-					#	chip drivers/ati/ragexl
-						chip drivers/pci/onboard
-							device pci 6.0 on end
-							register "rom_address" = "0xfff80000"
-						end
-						chip drivers/pci/onboard
-							device pci 8.0 on end
-						end
-					end
-					device pci a.0 off end # NIC
-	       				device pci b.0 off end # PCI E 3
-					device pci c.0 off end # PCI E 2
-					device pci d.0 on end # PCI E 1
-					device pci e.0 on end # PCI E 0
-					register "ide0_enable" = "1"
-					register "ide1_enable" = "1"
-					register "sata0_enable" = "1"
-					register "sata1_enable" = "1"
-				end
-			end #  device pci 18.0
-			device pci 18.0 on end # Link 1
-			device pci 18.0 on
-			#  devices on link 2, link 2 == LDT 2
-				chip southbridge/amd/amd8131
-					# the on/off keyword is mandatory
-					device pci 0.0 on end
-					device pci 0.1 on end
-					device pci 1.0 on
-						chip drivers/pci/onboard
-							device pci 9.0 on end # broadcom 5704
-							device pci 9.1 on end
-						end
-					end
-					device pci 1.1 on end
-				end
-			end # device pci 18.0
-			device pci 18.1 on end
-			device pci 18.2 on end
-			device pci 18.3 on end
-		end #mc0
-
-	end # pci_domain
-
-#	chip drivers/generic/debug
-#		device pnp 0.0 off end
-#		device pnp 0.1 off end
-#		device pnp 0.2 off end
-#		device pnp 0.3 off end
-#		device pnp 0.4 off end
-#		device pnp 0.5 on end
-#	end
-end # root_complex
+include devicetree.cb
Index: svn/src/mainboard/tyan/s2892/devicetree.cb
===================================================================
--- svn.orig/src/mainboard/tyan/s2892/devicetree.cb
+++ svn/src/mainboard/tyan/s2892/devicetree.cb
@@ -107,14 +107,13 @@  chip northbridge/amd/amdk8/root_complex
 					#	chip drivers/ati/ragexl
 						chip drivers/pci/onboard
 							device pci 6.0 on end
-							register "rom_address" = "0xfff80000"
 						end
 						chip drivers/pci/onboard
 							device pci 8.0 on end
 						end
 					end
 					device pci a.0 off end # NIC
-	       				device pci b.0 off end # PCI E 3
+					device pci b.0 off end # PCI E 3
 					device pci c.0 off end # PCI E 2
 					device pci d.0 on end # PCI E 1
 					device pci e.0 on end # PCI E 0