| Submitter | Carl-Daniel Hailfinger |
|---|---|
| Date | 2009-07-16 16:26:38 |
| Message ID | <4A5F54BE.9020101@gmx.net> |
| Download | mbox | patch |
| Permalink | /patch/39/ |
| State | Not for merge |
| Headers | show |
Comments
Hi Carl-Daniel, That worked perfectly. I was able to recover one unflashable m57sli system, and will be using this procedure on the others shortly. On Thu, Jul 16, 2009 at 06:26:38PM +0200, Carl-Daniel Hailfinger wrote: > For Ward Vandewege. > > IT87* SPI unallocated port recovery. > Some coreboot versions forget to set the correct SPI flash port. This in > turn causes the port range to stay unallocated and thus not passed > through to the device. > Since the serial port at 0x3f8 is always enabled, disable the serial > port, set its address to zero, then allow the user to set the SPI flash > port to 0x3f8. > > Not intended for merging yet, we need a proper user interface for this > > How to use this: > Boot a kernel with modular serial port, load the serial module and test > it with minicom/whatever, run > # lspci -nnvvvxxxx >lspci_loaded.txt > # superiotool -d >superiotool_loaded.txt > Unload the serial module, then run > # lspci -nnvvvxxxx >lspci_unloaded.txt > # superiotool -d >superiotool_unloaded.txt > # flashrom -p it87spi=port=0x3f8 > # lspci -nnvvvxxxx >lspci_modified.txt > # superiotool -d >superiotool_modified.txt > > The above sequence needs to happen right after a cold boot and after > testing the serial port. The flashrom step will alter some registers > until the next cold boot, so running it twice will not yield useful results. > > Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Ward Vandewege <ward@gnu.org> Thanks! Ward.
Patch
Index: flashrom-it87spi_emergency_serial_replacement/it87spi.c =================================================================== --- flashrom-it87spi_emergency_serial_replacement/it87spi.c (Revision 653) +++ flashrom-it87spi_emergency_serial_replacement/it87spi.c (Arbeitskopie) @@ -90,7 +90,7 @@ sio_write(port, 0x24, tmp); } printf("Serial flash pin %i\n", (tmp & 1 << 5) ? 87 : 29); - /* LDN 0x7, reg 0x64/0x65 */ + /* LDN 0x7 */ sio_write(port, 0x07, 0x7); flashport = sio_read(port, 0x64) << 8; flashport |= sio_read(port, 0x65); @@ -102,6 +102,16 @@ if (it87opts && (portpos = strstr(it87opts, "port="))) { portpos += 5; flashport = strtol(portpos, (char **)NULL, 0); + tmp = sio_read(port, 0x2b); + printf("Logical block lock is %02x\n", tmp); + printf("Disabling serial port\n"); + /* LDN 0x1 */ + sio_write(port, 0x07, 0x1); + sio_write(port, 0x30, 0x00); + sio_write(port, 0x60, 0x00); + sio_write(port, 0x61, 0x00); + /* LDN 0x7 */ + sio_write(port, 0x07, 0x7); printf("Forcing serial flash port 0x%04x\n", flashport); sio_write(port, 0x64, (flashport >> 8)); sio_write(port, 0x65, (flashport & 0xff));
For Ward Vandewege. IT87* SPI unallocated port recovery. Some coreboot versions forget to set the correct SPI flash port. This in turn causes the port range to stay unallocated and thus not passed through to the device. Since the serial port at 0x3f8 is always enabled, disable the serial port, set its address to zero, then allow the user to set the SPI flash port to 0x3f8. Not intended for merging yet, we need a proper user interface for this How to use this: Boot a kernel with modular serial port, load the serial module and test it with minicom/whatever, run # lspci -nnvvvxxxx >lspci_loaded.txt # superiotool -d >superiotool_loaded.txt Unload the serial module, then run # lspci -nnvvvxxxx >lspci_unloaded.txt # superiotool -d >superiotool_unloaded.txt # flashrom -p it87spi=port=0x3f8 # lspci -nnvvvxxxx >lspci_modified.txt # superiotool -d >superiotool_modified.txt The above sequence needs to happen right after a cold boot and after testing the serial port. The flashrom step will alter some registers until the next cold boot, so running it twice will not yield useful results. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>