Patchwork fam10 Kconfig

login
register
about
Submitter Myles Watson
Date 2009-10-12 21:23:16
Message ID <2831fecf0910121423m57b7a6aeoc01ceaf5ee877fc7@mail.gmail.com>
Download mbox | patch
Permalink /patch/393/
State Superseded
Headers show

Comments

Myles Watson - 2009-10-12 21:23:16
On Mon, Oct 12, 2009 at 2:54 PM, Marc Jones <marcj303@gmail.com> wrote:
> On Mon, Oct 12, 2009 at 11:54 AM, Myles Watson <mylesgw@gmail.com> wrote:
>> The big_bootblock patch fixes building but breaks booting.  It is only
>> for seeing what needs to be fixed with fam10 boards.
>>
>> fam10.diff makes serengeti_cheetah_fam10 build with a broken
>> bootblock, and updates lots of Kconfig variables.
>>
>> Signed-off-by: Myles Watson <mylesgw@gmail.com>
>>
>
> Thanks Myles, I was just getting interested in Fam10 stuff again. I
> had two issues using the patches
I have to admit I don't know how it built for me :(

> I get this on a make config
>
> src/mainboard/msi/ms7135/Kconfig:56:warning: type of 'MEM_TRAIN_SEQ'
> redefined from 'integer' to 'boolean'
Yes.  Everywhere MEM_TRAIN_SEQ is a boolean, it is an error.  It needs
to be set to 0,1, or 2.  This patch sets it correctly, but doesn't fix
all the others.

> I tried building and get an ACPI build error.
>
> /home/marc/svn/coreboot-v2/build/coreboot_ram.o: In function
> `write_acpi_tables':
> (.text+0xc3f4): undefined reference to `AmlCode_ssdt3'
> /home/marc/svn/coreboot-v2/build/coreboot_ram.o: In function
> `write_acpi_tables':
> (.text+0xc401): undefined reference to `AmlCode_ssdt4'
> /home/marc/svn/coreboot-v2/build/coreboot_ram.o: In function
> `write_acpi_tables':
> (.text+0xc409): undefined reference to `AmlCode_ssdt5'
> /home/marc/svn/coreboot-v2/build/coreboot_ram.o: In function
> `write_acpi_tables':
> (.text+0xc410): undefined reference to `AmlCode_ssdt2'
> collect2: ld returned 1 exit status
This is because CONFIG_ACPI_SSDTX_NUM isn't a boolean.

Thanks for trying it out.  Here's an updated patch that hopefully builds :)

Signed-off-by: Myles Watson <mylesgw@gmail.com>

Thanks,
Myles
Marc Jones - 2009-10-12 21:50:16
On Mon, Oct 12, 2009 at 3:23 PM, Myles Watson <mylesgw@gmail.com> wrote:
> On Mon, Oct 12, 2009 at 2:54 PM, Marc Jones <marcj303@gmail.com> wrote:
>> On Mon, Oct 12, 2009 at 11:54 AM, Myles Watson <mylesgw@gmail.com> wrote:
>>> The big_bootblock patch fixes building but breaks booting.  It is only
>>> for seeing what needs to be fixed with fam10 boards.
>>>
>>> fam10.diff makes serengeti_cheetah_fam10 build with a broken
>>> bootblock, and updates lots of Kconfig variables.
>>>
>>> Signed-off-by: Myles Watson <mylesgw@gmail.com>
>>>
>>
>> Thanks Myles, I was just getting interested in Fam10 stuff again. I
>> had two issues using the patches
> I have to admit I don't know how it built for me :(
>
>> I get this on a make config
>>
>> src/mainboard/msi/ms7135/Kconfig:56:warning: type of 'MEM_TRAIN_SEQ'
>> redefined from 'integer' to 'boolean'
> Yes.  Everywhere MEM_TRAIN_SEQ is a boolean, it is an error.  It needs
> to be set to 0,1, or 2.  This patch sets it correctly, but doesn't fix
> all the others.
>
>> I tried building and get an ACPI build error.
>>
>> /home/marc/svn/coreboot-v2/build/coreboot_ram.o: In function
>> `write_acpi_tables':
>> (.text+0xc3f4): undefined reference to `AmlCode_ssdt3'
>> /home/marc/svn/coreboot-v2/build/coreboot_ram.o: In function
>> `write_acpi_tables':
>> (.text+0xc401): undefined reference to `AmlCode_ssdt4'
>> /home/marc/svn/coreboot-v2/build/coreboot_ram.o: In function
>> `write_acpi_tables':
>> (.text+0xc409): undefined reference to `AmlCode_ssdt5'
>> /home/marc/svn/coreboot-v2/build/coreboot_ram.o: In function
>> `write_acpi_tables':
>> (.text+0xc410): undefined reference to `AmlCode_ssdt2'
>> collect2: ld returned 1 exit status
> This is because CONFIG_ACPI_SSDTX_NUM isn't a boolean.
>
> Thanks for trying it out.  Here's an updated patch that hopefully builds :)
>
> Signed-off-by: Myles Watson <mylesgw@gmail.com>

That builds but a bunch of *.aml are getting put into the top level.
Can they go somewhere in the build/ dir?

Marc

Patch

Index: svn/src/cpu/amd/socket_F_1207/Makefile.inc
===================================================================
--- svn.orig/src/cpu/amd/socket_F_1207/Makefile.inc
+++ svn/src/cpu/amd/socket_F_1207/Makefile.inc
@@ -10,5 +10,6 @@  subdirs-y += ../../x86/mmx
 subdirs-y += ../../x86/sse
 subdirs-y += ../../x86/lapic
 subdirs-y += ../../x86/cache
+subdirs-y += ../../x86/mtrr
 subdirs-y += ../../x86/pae
 subdirs-y += ../../x86/smm
Index: svn/src/mainboard/amd/serengeti_cheetah_fam10/Kconfig
===================================================================
--- svn.orig/src/mainboard/amd/serengeti_cheetah_fam10/Kconfig
+++ svn/src/mainboard/amd/serengeti_cheetah_fam10/Kconfig
@@ -13,9 +13,8 @@  config BOARD_AMD_SERENGETI_CHEETAH_FAM10
 	select USE_DCACHE_RAM
 	select HAVE_HARD_RESET
 	select IOAPIC
-	select AP_CODE_IN_CAR
 	select SB_HT_CHAIN_UNITID_OFFSET_ONLY
-	select WAIT_BEFORE_CPUS_INIT
+	select SERIAL_CPU_INIT
 	select AMDMCT
 	select HAVE_ACPI_TABLES
 
@@ -24,24 +23,9 @@  config MAINBOARD_DIR
 	default amd/serengeti_cheetah_fam10
 	depends on BOARD_AMD_SERENGETI_CHEETAH_FAM10
 
-config DCACHE_RAM_BASE
-	hex
-	default 0xc8000
-	depends on BOARD_AMD_SERENGETI_CHEETAH_FAM10
-
-config DCACHE_RAM_SIZE
-	hex
-	default 0x08000
-	depends on BOARD_AMD_SERENGETI_CHEETAH_FAM10
-
-config DCACHE_RAM_GLOBAL_VAR_SIZE
-	hex
-	default 0x01000
-	depends on BOARD_AMD_SERENGETI_CHEETAH_FAM10
-
 config APIC_ID_OFFSET
 	hex
-	default 0x8
+	default 0x0
 	depends on BOARD_AMD_SERENGETI_CHEETAH_FAM10
 
 config LB_CKS_RANGE_END
@@ -100,11 +84,6 @@  config USE_INIT
 	default n
 	depends on BOARD_AMD_SERENGETI_CHEETAH_FAM10
 
-config SERIAL_CPU_INIT
-	bool
-	default n
-	depends on BOARD_AMD_SERENGETI_CHEETAH_FAM10
-
 config IRQ_SLOT_COUNT
 	int
 	default 11
@@ -115,3 +94,42 @@  config AMD_UCODE_PATCH_FILE
 	default "mc_patch_01000095.h"
 	depends on BOARD_AMD_SERENGETI_CHEETAH_FAM10
 
+config BOOTBLOCK_SIZE
+	hex
+	default 0x18000
+	depends on BOARD_AMD_SERENGETI_CHEETAH_FAM10
+
+config LB_MEM_TOPK
+	hex
+	default 0x4000
+	depends on BOARD_AMD_SERENGETI_CHEETAH_FAM10
+
+config HEAP_SIZE
+	hex
+	default 0xc0000
+	depends on BOARD_AMD_SERENGETI_CHEETAH_FAM10
+
+config ACPI_SSDTX_NUM
+	int
+	default 31
+	depends on BOARD_AMD_SERENGETI_CHEETAH_FAM10
+
+config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID
+	hex
+	default 0x2b80
+	depends on BOARD_AMD_SERENGETI_CHEETAH_FAM10
+
+config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID
+	hex
+	default 0x1022
+	depends on BOARD_AMD_SERENGETI_CHEETAH_FAM10
+
+config ENABLE_APIC_EXT_ID
+	bool
+	default y
+	depends on BOARD_AMD_SERENGETI_CHEETAH_FAM10
+
+config LIFT_BSP_APIC_ID
+	bool
+	default y
+	depends on BOARD_AMD_SERENGETI_CHEETAH_FAM10
Index: svn/src/mainboard/amd/serengeti_cheetah_fam10/Makefile.inc
===================================================================
--- svn.orig/src/mainboard/amd/serengeti_cheetah_fam10/Makefile.inc
+++ svn/src/mainboard/amd/serengeti_cheetah_fam10/Makefile.inc
@@ -29,11 +29,13 @@  obj-$(CONFIG_HAVE_ACPI_TABLES) += dsdt.o
 obj-$(CONFIG_HAVE_ACPI_TABLES) += acpi_tables.o
 obj-$(CONFIG_HAVE_ACPI_TABLES) += fadt.o
 
-# ./ssdt.o is in northbridge/amd/amdk8/Config.lb
-obj-$(CONFIG_ACPI_SSDTX_NUM) += ssdt2.o
-obj-$(CONFIG_ACPI_SSDTX_NUM) += ssdt3.o
-obj-$(CONFIG_ACPI_SSDTX_NUM) += ssdt4.o
-driver-y += ../../../drivers/i2c/i2cmux/i2cmux.o
+# ./ssdt.o is in northbridge/amd/amdfam10/Makefile.inc
+obj-$(CONFIG_HAVE_ACPI_TABLES) += ssdt2.o
+obj-$(CONFIG_HAVE_ACPI_TABLES) += ssdt3.o
+obj-$(CONFIG_HAVE_ACPI_TABLES) += ssdt4.o
+obj-$(CONFIG_HAVE_ACPI_TABLES) += ssdt5.o
+
+driver-y += ../../../drivers/i2c/i2cmux2/i2cmux2.o
 
 # This is part of the conversion to init-obj and away from included code.
 
@@ -61,25 +63,31 @@  $(obj)/dsdt.c: $(src)/mainboard/$(MAINBO
 $(obj)/mainboard/$(MAINBOARDDIR)/dsdt.o: $(obj)/dsdt.c
 	$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c $< -o $@
 
-$(obj)/ssdt2.c: $(src)/mainboard/$(MAINBOARDDIR)/dx/pci2.asl
-	iasl -p $(CURDIR)/pci2 -tc $(CONFIG_MAINBOARD)/dx/pci2.asl
+$(obj)/mainboard/$(MAINBOARDDIR)/ssdt2.c: $(src)/mainboard/$(MAINBOARDDIR)/dx/pci2.asl
+	iasl -p $(CURDIR)/pci2 -tc $<
 	perl -pi -e 's/AmlCode/AmlCode_ssdt2/g' pci2.hex
-	mv pci2.hex ssdt2.c
+	mv pci2.hex $@
 
-$(obj)/ssdt3.c: $(src)/mainboard/$(MAINBOARDDIR)/dx/pci3.asl"
-	iasl -p $(CURDIR)/pci3 -tc $(CONFIG_MAINBOARD)/
+$(obj)/mainboard/$(MAINBOARDDIR)/ssdt3.c: $(src)/mainboard/$(MAINBOARDDIR)/dx/pci3.asl
+	iasl -p $(CURDIR)/pci3 -tc $<
 	perl -pi -e 's/AmlCode/AmlCode_ssdt3/g' pci3.hex
-	mv pci3.hex ssdt3.c
+	mv pci3.hex $@
 
-$(obj)/ssdt4.c: $(src)/mainboard/$(MAINBOARDDIR)/dx/pci4.asl"
-	iasl -p $(CURDIR)/pci4 -tc $(CONFIG_MAINBOARD)/dx/pci4.asl
+$(obj)/mainboard/$(MAINBOARDDIR)/ssdt4.c: $(src)/mainboard/$(MAINBOARDDIR)/dx/pci4.asl
+	iasl -p $(CURDIR)/pci4 -tc $<
 	perl -pi -e 's/AmlCode/AmlCode_ssdt4/g' pci4.hex
-	mv pci4.hex ssdt4.c
+	mv pci4.hex $@
+
+$(obj)/mainboard/$(MAINBOARDDIR)/ssdt5.c: $(src)/mainboard/$(MAINBOARDDIR)/dx/pci5.asl
+	iasl -p $(CURDIR)/pci5 -tc $<
+	perl -pi -e 's/AmlCode/AmlCode_ssdt5/g' pci5.hex
+	mv pci5.hex $@
 
 $(obj)/mainboard/$(MAINBOARDDIR)/auto.inc: $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c $(obj)/option_table.h
 	$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S  $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c -o $@
 	perl -e 's/\.rodata/.rom.data/g' -pi $@
 	perl -e 's/\.text/.section .rom.text/g' -pi $@
 
+
 endif
 
Index: svn/src/northbridge/amd/amdfam10/Makefile.inc
===================================================================
--- svn.orig/src/northbridge/amd/amdfam10/Makefile.inc
+++ svn/src/northbridge/amd/amdfam10/Makefile.inc
@@ -10,3 +10,36 @@  obj-$(CONFIG_HAVE_ACPI_TABLES) += sspr4.
 obj-$(CONFIG_HAVE_ACPI_TABLES) += sspr5.o
 
 obj-y += get_pci1234.o
+
+ifdef POST_EVALUATION
+$(obj)/northbridge/amd/amdfam10/ssdt.c: $(src)/northbridge/amd/amdfam10/ssdt.dsl
+	iasl -p $(CURDIR)/ssdt -tc $<
+	perl -pi -e 's/AmlCode/AmlCode_ssdt/g' ssdt.hex
+	mv ssdt.hex $@
+
+$(obj)/northbridge/amd/amdfam10/sspr1.c: $(src)/northbridge/amd/amdfam10/sspr1.dsl
+	iasl -p $(CURDIR)/sspr1 -tc $<
+	perl -pi -e 's/AmlCode/AmlCode_sspr1/g' sspr1.hex
+	mv sspr1.hex $@
+
+$(obj)/northbridge/amd/amdfam10/sspr2.c: $(src)/northbridge/amd/amdfam10/sspr2.dsl
+	iasl -p $(CURDIR)/sspr2 -tc $<
+	perl -pi -e 's/AmlCode/AmlCode_sspr2/g' sspr2.hex
+	mv sspr2.hex $@
+
+$(obj)/northbridge/amd/amdfam10/sspr3.c: $(src)/northbridge/amd/amdfam10/sspr3.dsl
+	iasl -p $(CURDIR)/sspr3 -tc $<
+	perl -pi -e 's/AmlCode/AmlCode_sspr3/g' sspr3.hex
+	mv sspr3.hex $@
+
+$(obj)/northbridge/amd/amdfam10/sspr4.c: $(src)/northbridge/amd/amdfam10/sspr4.dsl
+	iasl -p $(CURDIR)/sspr4 -tc $<
+	perl -pi -e 's/AmlCode/AmlCode_sspr4/g' sspr4.hex
+	mv sspr4.hex $@
+
+$(obj)/northbridge/amd/amdfam10/sspr5.c: $(src)/northbridge/amd/amdfam10/sspr5.dsl
+	iasl -p $(CURDIR)/sspr5 -tc $<
+	perl -pi -e 's/AmlCode/AmlCode_sspr5/g' sspr5.hex
+	mv sspr5.hex $@
+endif
+
Index: svn/src/Kconfig
===================================================================
--- svn.orig/src/Kconfig
+++ svn/src/Kconfig
@@ -135,8 +135,8 @@  config MMCONF_SUPPORT
 	default n
 
 config LB_MEM_TOPK
-	int
-	default 2048
+	hex
+	default 0x800
 
 config COMPRESSED_PAYLOAD_LZMA
 	bool
Index: svn/src/cpu/amd/Makefile.inc
===================================================================
--- svn.orig/src/cpu/amd/Makefile.inc
+++ svn/src/cpu/amd/Makefile.inc
@@ -1,4 +1,5 @@ 
 subdirs-$(CONFIG_CPU_AMD_SOCKET_F) += socket_F
+subdirs-$(CONFIG_CPU_AMD_SOCKET_F_1207) += socket_F_1207
 subdirs-$(CONFIG_CPU_AMD_SOCKET_754) += socket_754
 subdirs-$(CONFIG_CPU_AMD_SOCKET_939) += socket_939
 subdirs-$(CONFIG_CPU_AMD_SOCKET_940) += socket_940
Index: svn/src/cpu/amd/model_10xxx/Kconfig
===================================================================
--- svn.orig/src/cpu/amd/model_10xxx/Kconfig
+++ svn/src/cpu/amd/model_10xxx/Kconfig
@@ -28,16 +28,16 @@  config USE_DCACHE_RAM
 
 config DCACHE_RAM_BASE
 	hex
-	default 0xc8000
+	default 0xc4000
 	depends on CPU_AMD_MODEL_10XXX
 
 config DCACHE_RAM_SIZE
 	hex
-	default 0x08000
+	default 0x0c000
 	depends on CPU_AMD_MODEL_10XXX
 
 config DCACHE_RAM_GLOBAL_VAR_SIZE
 	hex
-	default 0x01000
+	default 0x04000
 	depends on CPU_AMD_MODEL_10XXX
 
Index: svn/src/cpu/amd/quadcore/Makefile.inc
===================================================================
--- /dev/null
+++ svn/src/cpu/amd/quadcore/Makefile.inc
@@ -0,0 +1 @@ 
+obj-y += amd_sibling.o
Index: svn/src/cpu/amd/socket_F_1207/Kconfig
===================================================================
--- svn.orig/src/cpu/amd/socket_F_1207/Kconfig
+++ svn/src/cpu/amd/socket_F_1207/Kconfig
@@ -35,10 +35,20 @@  config CAR_FAM10
 
 config CBB
 	hex
-	default 0xff
+	default 0x0
 	depends on CPU_AMD_SOCKET_F_1207
 
 config CDB
 	hex
-	default 0x0
+	default 0x18
+	depends on CPU_AMD_SOCKET_F_1207
+
+config XIP_ROM_BASE
+	hex
+	default 0xfff80000
+	depends on CPU_AMD_SOCKET_F_1207
+
+config XIP_ROM_SIZE
+	hex
+	default 0x80000
 	depends on CPU_AMD_SOCKET_F_1207
Index: svn/src/northbridge/amd/amdfam10/Kconfig
===================================================================
--- svn.orig/src/northbridge/amd/amdfam10/Kconfig
+++ svn/src/northbridge/amd/amdfam10/Kconfig
@@ -26,4 +26,14 @@  config AGP_APERTURE_SIZE
 	default 0x4000000
 	depends on NORTHBRIDGE_AMD_AMDFAM10
 
+config HYPERTRANSPORT_PLUGIN_SUPPORT
+	bool
+	default y
+	depends on NORTHBRIDGE_AMD_AMDFAM10
+
+config HT3_SUPPORT
+	bool
+	default y
+	depends on NORTHBRIDGE_AMD_AMDFAM10
+
 source src/northbridge/amd/amdfam10/root_complex/Kconfig