Patchwork Support for MSI MS-6156

login
register
about
Submitter Uwe Hermann
Date 2009-10-13 18:01:03
Message ID <20091013180103.GJ15511@greenwood>
Download mbox | patch
Permalink /patch/400/
State Accepted
Headers show

Comments

Uwe Hermann - 2009-10-13 18:01:03
As everyone is committing new boards today, I don't want to be left behind.
So here goes one more board for today (yet-another-440BX).

Boot-tested to a Linux prompt successfully.

Kconfig only, I didn't bother adding oldconfig files anymore.


Uwe.
Myles Watson - 2009-10-13 18:09:26
On Tue, Oct 13, 2009 at 12:01 PM, Uwe Hermann <uwe@hermann-uwe.de> wrote:
> As everyone is committing new boards today, I don't want to be left behind.
> So here goes one more board for today (yet-another-440BX).
>
> Boot-tested to a Linux prompt successfully.

Looks good.  Only picky things:
1. You used spaces for indentation instead of tabs in devicetree.cb
     It looks good, but I think it's good to be standard.

> Kconfig only, I didn't bother adding oldconfig files anymore.
2.  The downside is that you don't get run with abuild, so if someone
breaks the build you won't know.  Of course it's similar enough to
other boards that most likely it won't happen.

Acked-by: Myles Watson <mylesgw@gmail.com>

Thanks,
Myles
Uwe Hermann - 2009-10-13 19:27:17
On Tue, Oct 13, 2009 at 12:09:26PM -0600, Myles Watson wrote:
> On Tue, Oct 13, 2009 at 12:01 PM, Uwe Hermann <uwe@hermann-uwe.de> wrote:
> > As everyone is committing new boards today, I don't want to be left behind.
> > So here goes one more board for today (yet-another-440BX).
> >
> > Boot-tested to a Linux prompt successfully.
> 
> Looks good.  Only picky things:
> 1. You used spaces for indentation instead of tabs in devicetree.cb
>      It looks good, but I think it's good to be standard.

Yes, but I'd like to change that standard to "two spaces" in all
devicetree.cb files. Actually I sneaked in just that in all the boards
I added the last three years or so, and nobody noticed/complained ;-)

The Config.lb/devicetree.cb files can get _very_ convoluted and very
deeply nested, and one TAB for indentation (plus a comment on many
lines) make it _way_ to wide (definately lots more than 80 characters)
for my taste on many boards. Using two spaces looks much cleaner and
more readable in this case.

(This is an exception! I'm not proposing to do the same in C code or
the like. Only devicetree.cb!)


> > Kconfig only, I didn't bother adding oldconfig files anymore.
> 2.  The downside is that you don't get run with abuild, so if someone
> breaks the build you won't know.  Of course it's similar enough to
> other boards that most likely it won't happen.
> 
> Acked-by: Myles Watson <mylesgw@gmail.com>

Thanks, r4767. I added Config.lb et al for now to keep it in abuild,
but it shouldn't be required much longer, oldconfig will soon go away.


Uwe.
Myles Watson - 2009-10-13 19:37:57
> The Config.lb/devicetree.cb files can get _very_ convoluted and very
> deeply nested, and one TAB for indentation (plus a comment on many
> lines) make it _way_ to wide (definately lots more than 80 characters)
> for my taste on many boards. Using two spaces looks much cleaner and
> more readable in this case.
I agree that it looks better.  I'm a big fan of consistency, though,
so we should decide to make them all the same.

> (This is an exception! I'm not proposing to do the same in C code or
> the like. Only devicetree.cb!)
Sounds good to me.

Thanks,
Myles

Patch

Add support for the MSI MS-6156 board.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>

Index: src/mainboard/msi/Kconfig
===================================================================
--- src/mainboard/msi/Kconfig	(Revision 4760)
+++ src/mainboard/msi/Kconfig	(Arbeitskopie)
@@ -24,6 +24,7 @@ 
 	
 source "src/mainboard/msi/ms6119/Kconfig"
 source "src/mainboard/msi/ms6147/Kconfig"
+source "src/mainboard/msi/ms6156/Kconfig"
 source "src/mainboard/msi/ms6178/Kconfig"
 source "src/mainboard/msi/ms7135/Kconfig"
 source "src/mainboard/msi/ms7260/Kconfig"
Index: src/mainboard/msi/ms6156/Kconfig
===================================================================
--- src/mainboard/msi/ms6156/Kconfig	(Revision 0)
+++ src/mainboard/msi/ms6156/Kconfig	(Revision 0)
@@ -0,0 +1,51 @@ 
+##
+## This file is part of the coreboot project.
+##
+## Copyright (C) 2009 Uwe Hermann <uwe@hermann-uwe.de>
+##
+## This program is free software; you can redistribute it and/or modify
+## it under the terms of the GNU General Public License as published by
+## the Free Software Foundation; either version 2 of the License, or
+## (at your option) any later version.
+##
+## This program is distributed in the hope that it will be useful,
+## but WITHOUT ANY WARRANTY; without even the implied warranty of
+## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+## GNU General Public License for more details.
+##
+## You should have received a copy of the GNU General Public License
+## along with this program; if not, write to the Free Software
+## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
+##
+
+config BOARD_MSI_MS_6156
+	bool "MS-6156"
+	select ARCH_X86
+	select CPU_INTEL_SLOT_2
+	select NORTHBRIDGE_INTEL_I440BX
+	select SOUTHBRIDGE_INTEL_I82371EB
+	select SUPERIO_WINBOND_W83977TF
+	select HAVE_PIRQ_TABLE
+	select UDELAY_TSC
+	select TSC_X86RDTSC_CALIBRATE_WITH_TIMER2
+
+config MAINBOARD_DIR
+	string
+	default msi/ms6156
+	depends on BOARD_MSI_MS_6156
+
+config MAINBOARD_PART_NUMBER
+	string
+	default "MS-6156"
+	depends on BOARD_MSI_MS_6156
+
+config HAVE_OPTION_TABLE
+	bool
+	default n
+	depends on BOARD_MSI_MS_6156
+
+config IRQ_SLOT_COUNT
+	int
+	default 7
+	depends on BOARD_MSI_MS_6156
+
Index: src/mainboard/msi/ms6156/devicetree.cb
===================================================================
--- src/mainboard/msi/ms6156/devicetree.cb	(Revision 0)
+++ src/mainboard/msi/ms6156/devicetree.cb	(Revision 0)
@@ -0,0 +1,81 @@ 
+##
+## This file is part of the coreboot project.
+##
+## Copyright (C) 2009 Uwe Hermann <uwe@hermann-uwe.de>
+##
+## This program is free software; you can redistribute it and/or modify
+## it under the terms of the GNU General Public License as published by
+## the Free Software Foundation; either version 2 of the License, or
+## (at your option) any later version.
+##
+## This program is distributed in the hope that it will be useful,
+## but WITHOUT ANY WARRANTY; without even the implied warranty of
+## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+## GNU General Public License for more details.
+##
+## You should have received a copy of the GNU General Public License
+## along with this program; if not, write to the Free Software
+## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
+##
+
+chip northbridge/intel/i440bx		# Northbridge
+  device apic_cluster 0 on		# APIC cluster
+    chip cpu/intel/slot_2		# CPU (FIXME: It's slot 1, actually)
+      device apic 0 on end		# APIC
+    end
+  end
+  device pci_domain 0 on		# PCI domain
+    device pci 0.0 on end		# Host bridge
+    device pci 1.0 on end		# PCI/AGP bridge
+    chip southbridge/intel/i82371eb	# Southbridge
+      device pci 7.0 on			# ISA bridge
+        chip superio/winbond/w83977tf	# Super I/O
+          device pnp 3f0.0 on		# Floppy
+            io 0x60 = 0x3f0
+            irq 0x70 = 6
+            drq 0x74 = 2
+          end
+          device pnp 3f0.1 on		# Parallel port
+            io 0x60 = 0x378
+            irq 0x70 = 7
+            drq 0x74 = 3
+          end
+          device pnp 3f0.2 on		# COM1
+            io 0x60 = 0x3f8
+            irq 0x70 = 4
+          end
+          device pnp 3f0.3 on		# COM2 / IR
+            io 0x60 = 0x2f8
+            irq 0x70 = 3
+          end
+          device pnp 3f0.5 on		# PS/2 keyboard
+            io 0x60 = 0x60
+            io 0x62 = 0x64
+            irq 0x70 = 1		# PS/2 keyboard interrupt
+            irq 0x72 = 12		# PS/2 mouse interrupt
+          end
+          device pnp 3f0.7 off		# GPIO 1
+          end
+          device pnp 3f0.8 off		# GPIO 2
+          end
+          device pnp 3f0.9 off		# GPIO 3
+          end
+          device pnp 3f0.a off		# ACPI
+          end
+        end
+      end
+      device pci 7.1 on end		# IDE
+      device pci 7.2 on end		# USB
+      device pci 7.3 on end		# ACPI
+      device pci 14.0 on end		# Onboard audio (Ensoniq ES1371)
+      register "ide0_enable" = "1"
+      register "ide1_enable" = "1"
+      register "ide_legacy_enable" = "1"
+      # Enable UDMA/33 for higher speed if your IDE device(s) support it.
+      register "ide0_drive0_udma33_enable" = "1"
+      register "ide0_drive1_udma33_enable" = "1"
+      register "ide1_drive0_udma33_enable" = "1"
+      register "ide1_drive1_udma33_enable" = "1"
+    end
+  end
+end
Index: src/mainboard/msi/ms6156/Makefile.inc
===================================================================
--- src/mainboard/msi/ms6156/Makefile.inc	(Revision 0)
+++ src/mainboard/msi/ms6156/Makefile.inc	(Revision 0)
@@ -0,0 +1,22 @@ 
+##
+## This file is part of the coreboot project.
+##
+## Copyright (C) 2009 Uwe Hermann <uwe@hermann-uwe.de>
+##
+## This program is free software; you can redistribute it and/or modify
+## it under the terms of the GNU General Public License as published by
+## the Free Software Foundation; either version 2 of the License, or
+## (at your option) any later version.
+##
+## This program is distributed in the hope that it will be useful,
+## but WITHOUT ANY WARRANTY; without even the implied warranty of
+## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+## GNU General Public License for more details.
+##
+## You should have received a copy of the GNU General Public License
+## along with this program; if not, write to the Free Software
+## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
+##
+
+include $(src)/mainboard/Makefile.romccboard.inc
+
Index: src/mainboard/msi/ms6156/irq_tables.c
===================================================================
--- src/mainboard/msi/ms6156/irq_tables.c	(Revision 0)
+++ src/mainboard/msi/ms6156/irq_tables.c	(Revision 0)
@@ -0,0 +1,50 @@ 
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2009 Uwe Hermann <uwe@hermann-uwe.de>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
+ */
+
+#include <arch/pirq_routing.h>
+
+const struct irq_routing_table intel_irq_routing_table = {
+	PIRQ_SIGNATURE,		/* u32 signature */
+	PIRQ_VERSION,		/* u16 version */
+	32 + 16 * CONFIG_IRQ_SLOT_COUNT,/* Max. number of devices on the bus */
+	0x00,			/* Interrupt router bus */
+	(0x07 << 3) | 0x0,	/* Interrupt router dev */
+	0x800,			/* IRQs devoted exclusively to PCI usage */
+	0x8086,			/* Vendor */
+	0x7000,			/* Device */
+	0,			/* Miniport */
+	{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* u8 rfu[11] */
+	0xb3,			/* Checksum */
+	{
+		/* bus,        dev | fn,   {link, bitmap}, {link, bitmap}, {link, bitmap}, {link, bitmap}, slot, rfu */
+		{0x00, (0x0e << 3) | 0x0, {{0x60, 0xdeb8}, {0x61, 0xdeb8}, {0x62, 0xdeb8}, {0x63, 0xdeb8}}, 0x1, 0x0},
+		{0x00, (0x10 << 3) | 0x0, {{0x61, 0xdeb8}, {0x62, 0xdeb8}, {0x63, 0xdeb8}, {0x60, 0xdeb8}}, 0x2, 0x0},
+		{0x00, (0x12 << 3) | 0x0, {{0x62, 0xdeb8}, {0x63, 0xdeb8}, {0x60, 0xdeb8}, {0x61, 0xdeb8}}, 0x3, 0x0},
+		{0x00, (0x14 << 3) | 0x0, {{0x63, 0xdeb8}, {0x60, 0xdeb8}, {0x61, 0xdeb8}, {0x62, 0xdeb8}}, 0x4, 0x0},
+		{0x00, (0x00 << 3) | 0x0, {{0x00, 0xdeb8}, {0x00, 0xdeb8}, {0x00, 0xdeb8}, {0x00, 0xdeb8}}, 0x0, 0x0},
+		{0x00, (0x07 << 3) | 0x1, {{0x60, 0xdeb8}, {0x61, 0xdeb8}, {0x62, 0xdeb8}, {0x63, 0xdeb8}}, 0x0, 0x0},
+		{0x00, (0x01 << 3) | 0x0, {{0x60, 0xdeb8}, {0x61, 0xdeb8}, {0x62, 0xdeb8}, {0x63, 0xdeb8}}, 0x0, 0x0},
+	}
+};
+
+unsigned long write_pirq_routing_table(unsigned long addr)
+{
+	return copy_pirq_routing_table(addr);
+}
Index: src/mainboard/msi/ms6156/chip.h
===================================================================
--- src/mainboard/msi/ms6156/chip.h	(Revision 0)
+++ src/mainboard/msi/ms6156/chip.h	(Revision 0)
@@ -0,0 +1,22 @@ 
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2009 Uwe Hermann <uwe@hermann-uwe.de>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
+ */
+
+extern struct chip_operations mainboard_ops;
+struct mainboard_config {};
Index: src/mainboard/msi/ms6156/auto.c
===================================================================
--- src/mainboard/msi/ms6156/auto.c	(Revision 0)
+++ src/mainboard/msi/ms6156/auto.c	(Revision 0)
@@ -0,0 +1,72 @@ 
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2009 Uwe Hermann <uwe@hermann-uwe.de>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
+ */
+
+#define ASSEMBLY 1
+
+#include <stdint.h>
+#include <stdlib.h>
+#include <device/pci_def.h>
+#include <arch/io.h>
+#include <device/pnp_def.h>
+#include <arch/romcc_io.h>
+#include <arch/hlt.h>
+#include "pc80/serial.c"
+#include "arch/i386/lib/console.c"
+#include "lib/ramtest.c"
+#include "southbridge/intel/i82371eb/i82371eb_enable_rom.c"
+#include "southbridge/intel/i82371eb/i82371eb_early_smbus.c"
+#include "northbridge/intel/i440bx/raminit.h"
+#include "lib/debug.c"
+#include "pc80/udelay_io.c"
+#include "lib/delay.c"
+#include "cpu/x86/mtrr/earlymtrr.c"
+#include "cpu/x86/bist.h"
+#include "superio/winbond/w83977tf/w83977tf_early_serial.c"
+
+#define SERIAL_DEV PNP_DEV(0x3f0, W83977TF_SP1)
+
+static inline int spd_read_byte(unsigned int device, unsigned int address)
+{
+	return smbus_read_byte(device, address);
+}
+
+#include "northbridge/intel/i440bx/raminit.c"
+#include "northbridge/intel/i440bx/debug.c"
+
+static void main(unsigned long bist)
+{
+	if (bist == 0)
+		early_mtrr_init();
+
+	w83977tf_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
+	uart_init();
+	console_init();
+	report_bist_failure(bist);
+
+	/* Enable access to the full ROM chip, needed very early by CBFS. */
+	i82371eb_enable_rom(PCI_DEV(0, 7, 0)); /* ISA bridge is 00:07.0. */
+
+	enable_smbus();
+	/* dump_spd_registers(); */
+	sdram_set_registers();
+	sdram_set_spd_registers();
+	sdram_enable();
+	/* ram_check(0, 640 * 1024); */
+}
Index: src/mainboard/msi/ms6156/mainboard.c
===================================================================
--- src/mainboard/msi/ms6156/mainboard.c	(Revision 0)
+++ src/mainboard/msi/ms6156/mainboard.c	(Revision 0)
@@ -0,0 +1,26 @@ 
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2009 Uwe Hermann <uwe@hermann-uwe.de>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
+ */
+
+#include <device/device.h>
+#include "chip.h"
+
+struct chip_operations mainboard_ops = {
+	CHIP_NAME("MSI MS-6156 Mainboard")
+};