Comments
Patch
@@ -271,10 +271,11 @@ int rmmio_le_writew(uint16_t val, void *addr)
return 0;
}
-void rmmio_le_writel(uint32_t val, void *addr)
+int rmmio_le_writel(uint32_t val, void *addr)
{
register_undo_mmio_writel(addr);
mmio_le_writel(val, addr);
+ return 0;
}
void rmmio_valb(void *addr)
@@ -352,7 +352,7 @@ int rmmio_writew(uint16_t val, void *addr);
int rmmio_writel(uint32_t val, void *addr);
int rmmio_le_writeb(uint8_t val, void *addr);
int rmmio_le_writew(uint16_t val, void *addr);
-void rmmio_le_writel(uint32_t val, void *addr);
+int rmmio_le_writel(uint32_t val, void *addr);
#define pci_rmmio_writeb rmmio_le_writeb
#define pci_rmmio_writew rmmio_le_writew
#define pci_rmmio_writel rmmio_le_writel
@@ -124,7 +124,8 @@ int satamv_init(void)
msg_pspew("BAR2Sz=0x%01x\n", (tmp >> 19) & 0x7);
tmp &= 0xffffffc0;
tmp |= 0x0000001f;
- pci_rmmio_writel(tmp, mv_bar + PCI_BAR2_CONTROL);
+ if (pci_rmmio_writel(tmp, mv_bar + PCI_BAR2_CONTROL))
+ return 1;
/* Enable flash: GPIO Port Control Register 0x104f0 */
tmp = pci_mmio_readl(mv_bar + GPIO_PORT_CONTROL);
@@ -135,7 +136,8 @@ int satamv_init(void)
"values!\n");
tmp &= 0xfffffffc;
tmp |= 0x2;
- pci_rmmio_writel(tmp, mv_bar + GPIO_PORT_CONTROL);
+ if (pci_rmmio_writel(tmp, mv_bar + GPIO_PORT_CONTROL))
+ return 1;
/* Get I/O BAR location. */
tmp = pcidev_readbar(dev, PCI_BASE_ADDRESS_2);
Signed-off-by: Niklas Söderlund <niso@kth.se> --- hwaccess.c | 3 ++- programmer.h | 2 +- satamv.c | 6 ++++-- 3 files changed, 7 insertions(+), 4 deletions(-)