@@ -75,7 +75,8 @@ int atahpt_init(void)
/* Enable flash access. */
reg32 = pci_read_long(dev, REG_FLASH_ACCESS);
reg32 |= (1 << 24);
- rpci_write_long(dev, REG_FLASH_ACCESS, reg32);
+ if (rpci_write_long(dev, REG_FLASH_ACCESS, reg32))
+ return 1;
register_par_programmer(&par_programmer_atahpt, BUS_PARALLEL);
@@ -51,7 +51,8 @@ static int enable_flash_ali_m1533(struct pci_dev *dev, const char *name)
*/
tmp = pci_read_byte(dev, 0x47);
tmp |= 0x46;
- rpci_write_byte(dev, 0x47, tmp);
+ if (rpci_write_byte(dev, 0x47, tmp))
+ return ERROR_FATAL;
return 0;
}
@@ -88,7 +89,8 @@ static int enable_flash_sis85c496(struct pci_dev *dev, const char *name)
tmp = pci_read_byte(dev, 0xd0);
tmp |= 0xf8;
- rpci_write_byte(dev, 0xd0, tmp);
+ if (rpci_write_byte(dev, 0xd0, tmp))
+ return ERROR_FATAL;
return 0;
}
@@ -103,7 +105,9 @@ static int enable_flash_sis_mapping(struct pci_dev *dev, const char *name)
new = pci_read_byte(dev, SIS_MAPREG);
new &= (~0x04); /* No idea why we clear bit 2. */
new |= 0xb; /* 0x3 for some chipsets, bit 7 seems to be don't care. */
- rpci_write_byte(dev, SIS_MAPREG, new);
+ if (rpci_write_byte(dev, SIS_MAPREG, new))
+ return ERROR_FATAL;
+
newer = pci_read_byte(dev, SIS_MAPREG);
if (newer != new) { /* FIXME: share this with other code? */
msg_pinfo("Setting register 0x%x to 0x%02x on %s failed (WARNING ONLY).\n",
@@ -193,7 +197,9 @@ static int enable_flash_sis5x0(struct pci_dev *dev, const char *name, uint8_t di
new = pci_read_byte(sbdev, SIS_REG);
new &= (~dis_mask);
new |= en_mask;
- rpci_write_byte(sbdev, SIS_REG, new);
+ if (rpci_write_byte(sbdev, SIS_REG, new))
+ return ERROR_FATAL;
+
newer = pci_read_byte(sbdev, SIS_REG);
if (newer != new) { /* FIXME: share this with other code? */
msg_pinfo("Setting register 0x%x to 0x%02x on %s failed (WARNING ONLY).\n", SIS_REG, new, name);
@@ -250,7 +256,8 @@ static int enable_flash_piix4(struct pci_dev *dev, const char *name)
if (new == old)
return 0;
- rpci_write_word(dev, xbcs, new);
+ if (rpci_write_word(dev, xbcs, new))
+ return ERROR_FATAL;
if (pci_read_word(dev, xbcs) != new) { /* FIXME: share this with other code? */
msg_pinfo("Setting register 0x%04x to 0x%04x on %s failed (WARNING ONLY).\n", xbcs, new, name);
@@ -327,7 +334,8 @@ static int enable_flash_ich_bios_cntl(struct pci_dev *dev, enum ich_chipset ich_
/* Only write the register if it's necessary */
if (wanted != old) {
- rpci_write_byte(dev, bios_cntl, wanted);
+ if (rpci_write_byte(dev, bios_cntl, wanted))
+ return ERROR_FATAL;
new = pci_read_byte(dev, bios_cntl);
} else
new = old;
@@ -406,8 +414,10 @@ static int enable_flash_ich_fwh_decode(struct pci_dev *dev, enum ich_chipset ich
fwh_idsel_old |= pci_read_word(dev, fwh_sel2);
msg_pdbg("\nSetting IDSEL from 0x%012" PRIx64 " to 0x%012" PRIx64 " for top 16 MB.",
fwh_idsel_old, fwh_idsel);
- rpci_write_long(dev, fwh_sel1, (fwh_idsel >> 16) & 0xffffffff);
- rpci_write_word(dev, fwh_sel2, fwh_idsel & 0xffff);
+ if (rpci_write_long(dev, fwh_sel1, (fwh_idsel >> 16) & 0xffffffff))
+ return ERROR_FATAL;
+ if (rpci_write_word(dev, fwh_sel2, fwh_idsel & 0xffff))
+ return ERROR_FATAL;
/* FIXME: Decode settings are not changed. */
} else if (idsel) {
msg_perr("Error: fwh_idsel= specified, but no value given.\n");
@@ -720,7 +730,8 @@ static int via_no_byte_merge(struct pci_dev *dev, const char *name)
if (val & 0x40) {
msg_pdbg("Disabling byte merging\n");
val &= ~0x40;
- rpci_write_byte(dev, 0x71, val);
+ if (rpci_write_byte(dev, 0x71, val))
+ return ERROR_FATAL;
}
return NOT_DONE_YET; /* need to find south bridge, too */
}
@@ -730,12 +741,14 @@ static int enable_flash_vt823x(struct pci_dev *dev, const char *name)
uint8_t val;
/* Enable ROM decode range (1MB) FFC00000 - FFFFFFFF. */
- rpci_write_byte(dev, 0x41, 0x7f);
+ if (rpci_write_byte(dev, 0x41, 0x7f))
+ return ERROR_FATAL;
/* ROM write enable */
val = pci_read_byte(dev, 0x40);
val |= 0x10;
- rpci_write_byte(dev, 0x40, val);
+ if (rpci_write_byte(dev, 0x40, val))
+ return ERROR_FATAL;
if (pci_read_byte(dev, 0x40) != val) {
msg_pwarn("\nWarning: Failed to enable flash write on \"%s\"\n", name);
@@ -746,7 +759,8 @@ static int enable_flash_vt823x(struct pci_dev *dev, const char *name)
/* All memory cycles, not just ROM ones, go to LPC. */
val = pci_read_byte(dev, 0x59);
val &= ~0x80;
- rpci_write_byte(dev, 0x59, val);
+ if (rpci_write_byte(dev, 0x59, val))
+ return ERROR_FATAL;
}
return 0;
@@ -841,12 +855,14 @@ static int enable_flash_cs5530(struct pci_dev *dev, const char *name)
reg8 |= LOWER_ROM_ADDRESS_RANGE;
reg8 |= UPPER_ROM_ADDRESS_RANGE;
reg8 |= ROM_WRITE_ENABLE;
- rpci_write_byte(dev, ROM_AT_LOGIC_CONTROL_REG, reg8);
+ if (rpci_write_byte(dev, ROM_AT_LOGIC_CONTROL_REG, reg8))
+ return ERROR_FATAL;
/* Set positive decode on ROM. */
reg8 = pci_read_byte(dev, DECODE_CONTROL_REG2);
reg8 |= BIOS_ROM_POSITIVE_DECODE;
- rpci_write_byte(dev, DECODE_CONTROL_REG2, reg8);
+ if (rpci_write_byte(dev, DECODE_CONTROL_REG2, reg8))
+ return ERROR_FATAL;
reg8 = pci_read_byte(dev, CS5530_RESET_CONTROL_REG);
if (reg8 & CS5530_ISA_MASTER) {
@@ -911,7 +927,8 @@ static int enable_flash_sc1100(struct pci_dev *dev, const char *name)
#define SC_REG 0x52
uint8_t new;
- rpci_write_byte(dev, SC_REG, 0xee);
+ if (rpci_write_byte(dev, SC_REG, 0xee))
+ return ERROR_FATAL;
new = pci_read_byte(dev, SC_REG);
@@ -940,7 +957,8 @@ static int enable_flash_amd_via(struct pci_dev *dev, const char *name, uint8_t d
old = pci_read_byte(dev, AMD_MAPREG);
new = old | decode_val;
if (new != old) {
- rpci_write_byte(dev, AMD_MAPREG, new);
+ if (rpci_write_byte(dev, AMD_MAPREG, new))
+ return ERROR_FATAL;
if (pci_read_byte(dev, AMD_MAPREG) != new) {
msg_pwarn("Setting register 0x%x to 0x%02x on %s failed (WARNING ONLY).\n",
AMD_MAPREG, new, name);
@@ -953,7 +971,8 @@ static int enable_flash_amd_via(struct pci_dev *dev, const char *name, uint8_t d
new = old | 0x01;
if (new == old)
return 0;
- rpci_write_byte(dev, AMD_ENREG, new);
+ if (rpci_write_byte(dev, AMD_ENREG, new))
+ return ERROR_FATAL;
if (pci_read_byte(dev, AMD_ENREG) != new) {
msg_pwarn("Setting register 0x%x to 0x%02x on %s failed (WARNING ONLY).\n",
@@ -1005,7 +1024,8 @@ static int enable_flash_sb600(struct pci_dev *dev, const char *name)
(prot & 0xfffff800),
(prot & 0xfffff800) + (((prot & 0x7fc) << 8) | 0x3ff));
prot &= 0xfffffffc;
- rpci_write_byte(dev, reg, prot);
+ if (rpci_write_byte(dev, reg, prot))
+ return ERROR_FATAL;
prot = pci_read_long(dev, reg);
if (prot & 0x3)
msg_perr("SB600 %s%sunprotect failed from 0x%08x to 0x%08x\n",
@@ -1067,7 +1087,9 @@ static int enable_flash_nvidia_common(struct pci_dev *dev, const char *name)
if (new == old)
return 0;
- rpci_write_byte(dev, 0x6d, new);
+ if (rpci_write_byte(dev, 0x6d, new))
+ return ERROR_FATAL;
+
if (pci_read_byte(dev, 0x6d) != new) {
msg_pinfo("Setting register 0x6d to 0x%02x on %s failed.\n", new, name);
return 1;
@@ -1077,7 +1099,9 @@ static int enable_flash_nvidia_common(struct pci_dev *dev, const char *name)
static int enable_flash_nvidia_nforce2(struct pci_dev *dev, const char *name)
{
- rpci_write_byte(dev, 0x92, 0);
+ if (rpci_write_byte(dev, 0x92, 0))
+ return ERROR_FATAL;
+
if (enable_flash_nvidia_common(dev, name))
return ERROR_NONFATAL;
else
@@ -1099,7 +1123,8 @@ static int enable_flash_ck804(struct pci_dev *dev, const char *name)
err++;
} else {
msg_pdbg("Unlocking protection in register 0x%02x... ", reg);
- rpci_write_byte(dev, reg, segctrl & 0xF0);
+ if (rpci_write_byte(dev, reg, segctrl & 0xF0))
+ return ERROR_FATAL;
segctrl = pci_read_byte(dev, reg);
if ((segctrl & 0x3) != 0x0) {
@@ -1123,7 +1148,8 @@ static int enable_flash_ck804(struct pci_dev *dev, const char *name)
continue;
}
msg_pdbg("Unlocking protection in register 0x%02x... ", reg);
- rpci_write_long(dev, reg, 0x00000000);
+ if (rpci_write_long(dev, reg, 0x00000000))
+ return ERROR_FATAL;
segctrl = pci_read_long(dev, reg);
if ((segctrl & 0x33333333) != 0x00000000) {
@@ -1143,7 +1169,8 @@ static int enable_flash_ck804(struct pci_dev *dev, const char *name)
old = pci_read_byte(dev, reg);
new = old | 0xC0;
if (new != old) {
- rpci_write_byte(dev, reg, new);
+ if (rpci_write_byte(dev, reg, new))
+ return ERROR_FATAL;
if (pci_read_byte(dev, reg) != new) { /* FIXME: share this with other code? */
msg_pinfo("Setting register 0x%02x to 0x%02x on %s failed.\n", reg, new, name);
err++;
@@ -1193,12 +1220,14 @@ static int enable_flash_sb400(struct pci_dev *dev, const char *name)
/* Enable some SMBus stuff. */
tmp = pci_read_byte(smbusdev, 0x79);
tmp |= 0x01;
- rpci_write_byte(smbusdev, 0x79, tmp);
+ if (rpci_write_byte(smbusdev, 0x79, tmp))
+ return ERROR_FATAL;
/* Change southbridge. */
tmp = pci_read_byte(dev, 0x48);
tmp |= 0x21;
- rpci_write_byte(dev, 0x48, tmp);
+ if (rpci_write_byte(dev, 0x48, tmp))
+ return ERROR_FATAL;
/* Now become a bit silly. */
tmp = INB(0xc6f);
@@ -1220,13 +1249,16 @@ static int enable_flash_mcp55(struct pci_dev *dev, const char *name)
/* Set the 0-16 MB enable bits. */
val = pci_read_byte(dev, 0x88);
val |= 0xff; /* 256K */
- rpci_write_byte(dev, 0x88, val);
+ if (rpci_write_byte(dev, 0x88, val))
+ return ERROR_FATAL;
val = pci_read_byte(dev, 0x8c);
val |= 0xff; /* 1M */
- rpci_write_byte(dev, 0x8c, val);
+ if (rpci_write_byte(dev, 0x8c, val))
+ return ERROR_FATAL;
wordval = pci_read_word(dev, 0x90);
wordval |= 0x7fff; /* 16M */
- rpci_write_word(dev, 0x90, wordval);
+ if (rpci_write_word(dev, 0x90, wordval))
+ return ERROR_FATAL;
if (enable_flash_nvidia_common(dev, name))
return ERROR_NONFATAL;
@@ -1281,7 +1313,8 @@ static int enable_flash_mcp6x_7x(struct pci_dev *dev, const char *name)
#if 0
val |= (1 << 6);
val &= ~(1 << 5);
- rpci_write_byte(dev, 0x8a, val);
+ if (rpci_write_byte(dev, 0x8a, val))
+ return ERROR_FATAL;
#endif
if (mcp6x_spi_init(want_spi))
@@ -1304,11 +1337,13 @@ static int enable_flash_ht1000(struct pci_dev *dev, const char *name)
/* Set the 4MB enable bit. */
val = pci_read_byte(dev, 0x41);
val |= 0x0e;
- rpci_write_byte(dev, 0x41, val);
+ if (rpci_write_byte(dev, 0x41, val))
+ return ERROR_FATAL;
val = pci_read_byte(dev, 0x43);
val |= (1 << 4);
- rpci_write_byte(dev, 0x43, val);
+ if (rpci_write_byte(dev, 0x43, val))
+ return ERROR_FATAL;
return 0;
}
@@ -73,7 +73,8 @@ int drkaiser_init(void)
return 1;
/* Write magic register to enable flash write. */
- rpci_write_word(dev, PCI_MAGIC_DRKAISER_ADDR, PCI_MAGIC_DRKAISER_VALUE);
+ if (rpci_write_word(dev, PCI_MAGIC_DRKAISER_ADDR, PCI_MAGIC_DRKAISER_VALUE))
+ return 1;
/* Map 128kB flash memory window. */
drkaiser_bar = rphysmap("Dr. Kaiser PC-Waechter flash memory", addr, DRKAISER_MEMMAP_SIZE);
@@ -103,7 +103,8 @@ int gfxnvidia_init(void)
/* Allow access to flash interface (will disable screen). */
reg32 = pci_read_long(dev, 0x50);
reg32 &= ~(1 << 0);
- rpci_write_long(dev, 0x50, reg32);
+ if (rpci_write_long(dev, 0x50, reg32))
+ return 1;
/* Write/erase doesn't work. */
programmer_may_write = 0;
@@ -21,6 +21,7 @@
#include <stdlib.h>
#include <string.h>
+#include <errno.h>
#include "flash.h"
#include "programmer.h"
#include "hwaccess.h"
@@ -296,13 +297,13 @@ int undo_pci_write(void *p)
return 0;
}
-#define register_undo_pci_write(a, b, c) \
+#define register_undo_pci_write_or_return(a, b, c) \
{ \
struct undo_pci_write_data *undo_pci_write_data; \
undo_pci_write_data = malloc(sizeof(struct undo_pci_write_data)); \
if (!undo_pci_write_data) { \
msg_gerr("Out of memory!\n"); \
- exit(1); \
+ return ENOMEM; \
} \
undo_pci_write_data->dev = *a; \
undo_pci_write_data->reg = b; \
@@ -311,24 +312,36 @@ int undo_pci_write(void *p)
register_shutdown(undo_pci_write, undo_pci_write_data); \
}
-#define register_undo_pci_write_byte(a, b) register_undo_pci_write(a, b, byte)
-#define register_undo_pci_write_word(a, b) register_undo_pci_write(a, b, word)
-#define register_undo_pci_write_long(a, b) register_undo_pci_write(a, b, long)
+#define register_undo_pci_write_byte_or_return(a, b) register_undo_pci_write_or_return(a, b, byte)
+#define register_undo_pci_write_word_or_return(a, b) register_undo_pci_write_or_return(a, b, word)
+#define register_undo_pci_write_long_or_return(a, b) register_undo_pci_write_or_return(a, b, long)
int rpci_write_byte(struct pci_dev *dev, int reg, uint8_t data)
{
- register_undo_pci_write_byte(dev, reg);
- return pci_write_byte(dev, reg, data);
+ register_undo_pci_write_byte_or_return(dev, reg);
+ if (pci_write_byte(dev, reg, data) != 1) {
+ msg_perr("pci write byte failed\n");
+ return 1;
+ }
+ return 0;
}
int rpci_write_word(struct pci_dev *dev, int reg, uint16_t data)
{
- register_undo_pci_write_word(dev, reg);
- return pci_write_word(dev, reg, data);
+ register_undo_pci_write_word_or_return(dev, reg);
+ if (pci_write_word(dev, reg, data) != 1) {
+ msg_perr("pci write word failed\n");
+ return 1;
+ }
+ return 0;
}
int rpci_write_long(struct pci_dev *dev, int reg, uint32_t data)
{
- register_undo_pci_write_long(dev, reg);
- return pci_write_long(dev, reg, data);
+ register_undo_pci_write_long_or_return(dev, reg);
+ if (pci_write_long(dev, reg, data) != 1) {
+ msg_perr("pci write long failed\n");
+ return 1;
+ }
+ return 0;
}
All callers modified to handle and propagate return codes instead of relaying on the exit call. Signed-off-by: Niklas Söderlund <niso@kth.se> --- atahpt.c | 3 +- chipset_enable.c | 97 ++++++++++++++++++++++++++++++++++++++------------------ drkaiser.c | 3 +- gfxnvidia.c | 3 +- pcidev.c | 35 +++++++++++++------- 5 files changed, 96 insertions(+), 45 deletions(-)