Patchwork Added SST25WF080

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Submitter jharper@iseis.com
Date 2014-02-26 22:24:59
Message ID <20140226222459.48058yf02qt1uegg@webmail.iseis.com>
Download mbox | patch
Permalink /patch/4112/
State Accepted
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Comments

jharper@iseis.com - 2014-02-26 22:24:59
This patch adds support for the SST25WF080 1 Mbyte SPI flash chip.  It  
has been very minimally tested (basically one each read/write/verify),  
on Windows XP with a USB Blaster as the programmer.  It worked,  
although it was horribly slow (at least 15 minutes to program 1 MB) -  
but I have not otherwise used this hardware/software combination to  
program anything, so that might be normal.
- Jason Harper

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Stefan Tauner - 2014-02-27 07:00:46
On Wed, 26 Feb 2014 22:24:59 +0000
jharper@iseis.com wrote:

> This patch adds support for the SST25WF080 1 Mbyte SPI flash chip.  It  
> has been very minimally tested (basically one each read/write/verify),  
> on Windows XP with a USB Blaster as the programmer.  It worked,  
> although it was horribly slow (at least 15 minutes to program 1 MB) -  
> but I have not otherwise used this hardware/software combination to  
> program anything, so that might be normal.
> - Jason Harper

Hello Jason,

thanks for the patch. It looks good apart from the .tested field which
should be set to TEST_OK_PREW and I'd like to commit it. For that we
need a proper declaration of authorship though. Please see
http://www.coreboot.org/Development_Guidelines#Sign-off_Procedure

Performance was always an issue with the Bus Pirate (especially with
SST chips that required 1-byte writes), but I thought the FT2232-based
programmers to be faster. If flashrom didn't complain about failing
erases or something similar it is probably normal.
jharper@iseis.com - 2014-02-27 14:33:31
Quoting Stefan Tauner <stefan.tauner@student.tuwien.ac.at>:
> Hello Jason,
>
> thanks for the patch. It looks good apart from the .tested field which
> should be set to TEST_OK_PREW and I'd like to commit it. For that we
> need a proper declaration of authorship though. Please see
> http://www.coreboot.org/Development_Guidelines#Sign-off_Procedure

Ok, my previous patch is hereby...
Signed-off-by: Jason Harper <jharper@iseis.com>

I didn't feel comfortable setting the .tested field, given the  
extremely brief nature of my testing, and the fact that I just copied  
an existing SST device that was itself untested.  Nothing I did would  
have verified that the smaller erase block sizes were correct, for  
example.

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Stefan Tauner - 2014-05-04 00:55:35
On Thu, 27 Feb 2014 14:33:31 +0000
jharper@iseis.com wrote:

> Quoting Stefan Tauner <stefan.tauner@student.tuwien.ac.at>:
> > Hello Jason,
> >
> > thanks for the patch. It looks good apart from the .tested field which
> > should be set to TEST_OK_PREW and I'd like to commit it. For that we
> > need a proper declaration of authorship though. Please see
> > http://www.coreboot.org/Development_Guidelines#Sign-off_Procedure
> 
> Ok, my previous patch is hereby...
> Signed-off-by: Jason Harper <jharper@iseis.com>

Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
and committed in r1785.
Additionally, I have refined status register prettyprinting and
unlocking of the whole family.

> I didn't feel comfortable setting the .tested field, given the  
> extremely brief nature of my testing, and the fact that I just copied  
> an existing SST device that was itself untested.  Nothing I did would  
> have verified that the smaller erase block sizes were correct, for  
> example.

Good enough, or at least equivalent to the flag's semantics ;)
BTW flashrom uses the smallest (first) erase block size... so you have
just tested the 4k eraser and not the *bigger* ones.

Patch

Index: flashchips.c
===================================================================
--- flashchips.c	(revision 1764)
+++ flashchips.c	(working copy)
@@ -9665,6 +9665,43 @@ 
 
 	{
 		.vendor		= "SST",
+		.name		= "SST25WF080",
+		.bustype	= BUS_SPI,
+		.manufacture_id	= SST_ID,
+		.model_id	= SST_SST25WF080,
+		.total_size	= 1024,
+		.page_size	= 256,
+		.feature_bits	= FEATURE_WRSR_EITHER,
+		.tested		= TEST_UNTESTED,
+		.probe		= probe_spi_rdid,
+		.probe_timing	= TIMING_ZERO,
+		.block_erasers	=
+		{
+			{
+				.eraseblocks = { {4 * 1024, 256} },
+				.block_erase = spi_block_erase_20,
+			}, {
+				.eraseblocks = { {32 * 1024, 32} },
+				.block_erase = spi_block_erase_52,
+			}, {
+				.eraseblocks = { {64 * 1024, 16} },
+				.block_erase = spi_block_erase_d8,
+			}, {
+				.eraseblocks = { {1024 * 1024, 1} },
+				.block_erase = spi_block_erase_60,
+			}, {
+				.eraseblocks = { {1024 * 1024, 1} },
+				.block_erase = spi_block_erase_c7,
+			},
+		},
+		.unlock		= spi_disable_blockprotect,
+		.write		= spi_aai_write,
+		.read		= spi_chip_read, /* Fast read (0x0B) supported */
+		.voltage	= {1650, 1950},
+	},
+
+	{
+		.vendor		= "SST",
 		.name		= "SST28SF040A",
 		.bustype	= BUS_PARALLEL,
 		.manufacture_id	= SST_ID,
Index: flashchips.h
===================================================================
--- flashchips.h	(revision 1764)
+++ flashchips.h	(working copy)
@@ -571,6 +571,7 @@ 
 #define SST_SST25WF010		0x2502
 #define SST_SST25WF020		0x2503
 #define SST_SST25WF040		0x2504
+#define SST_SST25WF080		0x2505
 #define SST_SST25VF512A_REMS	0x48	/* REMS or RES opcode */
 #define SST_SST25VF010_REMS	0x49	/* REMS or RES opcode */
 #define SST_SST25VF020_REMS	0x43	/* REMS or RES opcode */