Patchwork Add support for SST26VF064B

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Submitter Wei Hu
Date 2014-04-01 05:18:48
Message ID <CANwcMEbVRM79Lc0YApfOoH3_kkY40fBgEprXxaMPEy1r1P=1Qg@mail.gmail.com>
Download mbox | patch
Permalink /patch/4126/
State Superseded
Headers show

Comments

Wei Hu - 2014-04-01 05:18:48
Datasheet available at
http://ww1.microchip.com/downloads/en/DeviceDoc/20005119D.pdf
Add support for SST26VF064B.

Differences between SST26 and SST25:
1. The WREN instruction must be executed prior to WRSR [Section 5.31].
   There is no EWSR.
2. Block protection bits are no longer in the status register. There
   is a dedicated 144-bit register [Table 5-6].  The device is
   write-protected by default. A Global Block-Protection Unlock
   command unlocks the entire memory [Section 4.1].

Signed-off-by: Wei Hu <wei@aristanetworks.com>

Patch

Index: chipdrivers.h
===================================================================
--- chipdrivers.h	(revision 1769)
+++ chipdrivers.h	(working copy)
@@ -100,6 +100,7 @@ 
 int spi_prettyprint_status_register_sst25(struct flashctx *flash);
 int spi_prettyprint_status_register_sst25vf016(struct flashctx *flash);
 int spi_prettyprint_status_register_sst25vf040b(struct flashctx *flash);
+int spi_disable_blockprotect_sst26_global_unprotect(struct flashctx *flash);
 
 /* sfdp.c */
 int probe_spi_sfdp(struct flashctx *flash);
Index: flashchips.c
===================================================================
--- flashchips.c	(revision 1769)
+++ flashchips.c	(working copy)
@@ -9957,6 +9957,38 @@ 
 
 	{
 		.vendor		= "SST",
+		.name		= "SST26VF064B",
+		.bustype	= BUS_SPI,
+		.manufacture_id	= SST_ID,
+		.model_id	= SST_SST26VF064B,
+		.total_size	= 8192,
+		.page_size	= 256,
+		.feature_bits	= FEATURE_WRSR_WREN,
+		.tested		= TEST_OK_PREW,
+		.probe		= probe_spi_rdid,
+		.probe_timing	= TIMING_ZERO,
+		.block_erasers	=
+		{
+			{
+				.eraseblocks = { {4 * 1024, 2048} },
+				.block_erase = spi_block_erase_20,
+			}, {
+				.eraseblocks = { {64 * 1024, 128} },
+				.block_erase = spi_block_erase_d8,
+			}, {
+				.eraseblocks = { {8 * 1024 * 1024, 1} },
+				.block_erase = spi_block_erase_c7,
+			},
+		},
+		.printlock	= spi_prettyprint_status_register_sst25, /* TODO: check */
+		.unlock		= spi_disable_blockprotect_sst26_global_unprotect,
+		.write		= spi_chip_write_256,
+		.read		= spi_chip_read,
+		.voltage	= {2700, 3600},
+	},
+
+	{
+		.vendor		= "SST",
 		.name		= "SST25WF512",
 		.bustype	= BUS_SPI,
 		.manufacture_id	= SST_ID,
Index: flashchips.h
===================================================================
--- flashchips.h	(revision 1769)
+++ flashchips.h	(working copy)
@@ -590,6 +590,7 @@ 
 #define SST_SST25VF064C		0x254B
 #define SST_SST26VF016		0x2601
 #define SST_SST26VF032		0x2602
+#define SST_SST26VF064B		0x2643
 #define SST_SST27SF512		0xA4
 #define SST_SST27SF010		0xA5
 #define SST_SST27SF020		0xA6
Index: spi25_statusreg.c
===================================================================
--- spi25_statusreg.c	(revision 1769)
+++ spi25_statusreg.c	(working copy)
@@ -196,6 +196,22 @@ 
 	return spi_disable_blockprotect_generic(flash, 0x3C, 0, 0, 0xFF);
 }
 
+int spi_disable_blockprotect_sst26_global_unprotect(struct flashctx *flash)
+{
+	static const unsigned char cmd[] = { 0x98 }; /* ULBPR */
+	int result;
+
+	/* Status register no longer contains the bp (block protection) bits */
+	result = spi_disable_blockprotect_generic(flash, 0, 0, 0, 0);
+	if (result)
+		return result;
+
+	result = spi_send_command(flash, sizeof(cmd), 0, cmd, NULL);
+	if (result)
+		msg_cerr("ULBPR failed\n");
+	return result;
+}
+
 /* A common block protection disable that tries to unset the status register bits masked by 0x1C (BP0-2) and
  * protected/locked by bit #7. Useful when bit #5 is neither a protection bit nor reserved (and hence possibly
  * non-0). */