Patchwork New GigaDevice chips and tiny pastebug fix

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Submitter Роман Титов
Date 2015-03-06 07:51:11
Message ID <1425628271.27738.0@smtp.gmail.com>
Download mbox | patch
Permalink /patch/4294/
State Superseded
Headers show

Comments

Роман Титов - 2015-03-06 07:51:11
Few days ago stefanct, gave me a bunch of datasheets for GigaDevice 
chips, so I could get me way into flashrom.

Here is 2 pathces. One with GigaDevice chips support and one with a fix 
to *PROBABLE* pastebug in AMIC A25LQ64 chip definition, which I found 
earlier.

I never used mailing lists and not sure about mime64 attachments, so 
archive with datasheets can be found here: 
https://www.dropbox.com/s/sk5mecwj7e4z4t3/GIGADEVICE_GD25LQ.tar.bz2?dl=0
Stefan Tauner - 2015-03-08 19:17:06
On Fri, 06 Mar 2015 17:51:11 +1000
Роман Титов <titovroman@gmail.com> wrote:

> one with a fix 
> to *PROBABLE* pastebug in AMIC A25LQ64 chip definition, which I found 
> earlier.

Hi Roman,

thanks for that! It looks indeed like this has been there since we
added "support" for the chip in 2013. I will commit this later together
with other small changes.
Stefan Tauner - 2015-03-08 22:24:50
On Fri, 06 Mar 2015 17:51:11 +1000
Роман Титов <titovroman@gmail.com> wrote:

> One with GigaDevice chips support

Hi,

the patch looks syntactically ok but does not apply *cleanly* with
git-am. Against which revision did you create it? The git hash in the
patch suggests that it is against r1886-r1888 but I tried that...

Patching with patch instead of git-am works (thanks to some fuzzying),
but I was wondering what was causing that...?
Роман Титов - 2015-03-09 00:18:36
Well, I think this could be the result of my inexperience with svn
(and git-svn).

So, here's my steps:
1. git svn clone -rHEAD (r1887, to be exact) flashrom-trunk (I have an
error, when I'm trying to make full git svn clone, looks like git bug
:/)
2. *code*
3. make 2 local commits
4. git format-patch, and it throw me 2 patches for 2 latest commits
not over current origin (and I think thats is the reason)
5. send patches to mailing list

My suggestions would be:
1. shallow copying broke smth (idea, that git svn could bond git stuff
to full svn history stuff came to me just right now)
2. formating 2 patches broke smth
3. both?


2015-03-09 8:24 GMT+10:00 Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>:
> On Fri, 06 Mar 2015 17:51:11 +1000
> Роман Титов <titovroman@gmail.com> wrote:
>
>> One with GigaDevice chips support
>
> Hi,
>
> the patch looks syntactically ok but does not apply *cleanly* with
> git-am. Against which revision did you create it? The git hash in the
> patch suggests that it is against r1886-r1888 but I tried that...
>
> Patching with patch instead of git-am works (thanks to some fuzzying),
> but I was wondering what was causing that...?
>
> --
> Kind regards/Mit freundlichen Grüßen, Stefan Tauner
Stefan Tauner - 2015-03-11 18:08:50
On Mon, 9 Mar 2015 10:18:36 +1000
Roman Titov <titovroman@gmail.com> wrote:

Hello Roman!

> Well, I think this could be the result of my inexperience with svn
> (and git-svn).
> 
> So, here's my steps:
> 1. git svn clone -rHEAD (r1887, to be exact) flashrom-trunk (I have an
> error, when I'm trying to make full git svn clone, looks like git bug
> :/)
> 2. *code*
> 3. make 2 local commits
> 4. git format-patch, and it throw me 2 patches for 2 latest commits
> not over current origin (and I think thats is the reason)
> 5. send patches to mailing list

That's perfectly fine and how I work too (well, I use git send-email
for 4 and 5).

> My suggestions would be:
> 1. shallow copying broke smth (idea, that git svn could bond git stuff
> to full svn history stuff came to me just right now)
> 2. formating 2 patches broke smth
> 3. both?

The problem is/was the last hunk. I guess you have opened the patch
file in an editor that removes white space at the end of lines.
The patch application does not seem to care but git-am does.

Anyway, here is a list of things I have noticed in the patch.

> From 3612049b7f6b2283ae4e593e66f369144b9e997b Mon Sep 17 00:00:00 2001
> From: Roman Titov <titovroman@gmail.com>
> Date: Fri, 6 Mar 2015 17:18:43 +1000
> Subject: [PATCH 1/2] flashchips: new GigaDevice chips (GD25LQ40, GD25LQ80,
>  GD25LQ16, GD25LQ64(B), GD25LQ128)
> 
> Signed-off-by: Roman Titov <titovroman@gmail.com>
> 
> ---
>  flashchips.c | 197 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++-
>  1 file changed, 196 insertions(+), 1 deletion(-)
> 
> diff --git a/flashchips.c b/flashchips.c
> index 8b5d1ec..31541ea 100644
> --- a/flashchips.c
> +++ b/flashchips.c
> @@ -5466,6 +5466,123 @@ const struct flashchip flashchips[] = {
> 
>  	{
>  		.vendor		= "GigaDevice",
> +		.name		= "GD25LQ40",
> +		.bustype	= BUS_SPI,
> +		.manufacture_id	= GIGADEVICE_ID,
> +		.model_id	= GIGADEVICE_GD25LQ40,
> +		.total_size	= 512,
> +		.page_size	= 256,
> +		/* OTP: 1024B total, 256B reserved; read 0x48; write 0x42, erase 0x44 */
> +		.feature_bits	= FEATURE_WRSR_WREN | FEATURE_OTP,
> +		.tested		= TEST_OK_PREW,

According to the line above and the respective ones later,
you had all that hardware at hand and tested it successfully.
Correct me if I am wrong, but I don't think that's the case ;)

> +		.probe		= probe_spi_rdid,
> +		.probe_timing	= TIMING_ZERO,
> +		.block_erasers	=
> +		{
> +			{
> +				.eraseblocks = { {4 * 1024, 128} },
> +				.block_erase = spi_block_erase_20,
> +			}, {
> +				.eraseblocks = { {32 * 1024, 16} },
> +				.block_erase = spi_block_erase_52,
> +			}, {
> +				.eraseblocks = { {64 * 1024, 8} },
> +				.block_erase = spi_block_erase_d8,
> +			}, {
> +				.eraseblocks = { {512 * 1024, 1} },
> +				.block_erase = spi_block_erase_60,
> +			}, {
> +				.eraseblocks = { {512 * 1024, 1} },
> +				.block_erase = spi_block_erase_c7,
> +			}
> +		},
> +		.printlock	= spi_prettyprint_status_register_bp4_srwd,
> +		.unlock		= spi_disable_blockprotect_bp4_srwd, /* TODO: 2nd status reg (read with 0x35) */
> +		.write		= spi_chip_write_256,
> +		.read		= spi_chip_read,

The chips support multiple read and opcodes (unlike flashrom yet!). 
We note that at least for new chips by adding a comment like this:
 /* Fast read (0x0B) and multi I/O supported */
(cf. with similar comments throughout the file).

> +		.voltage	= {1700, 1950},

It should actually be 1695, 1950 instead. 
This is also an error in the existing definition of the GD25LQ32.


Apart from these repeated copy & paste errors it looks good.
Please fix them so that I can commit your first flashrom
contribution, thanks!

Have you noticed any differences between the GD25LQ64 and its B
revision?

Patch

From 3612049b7f6b2283ae4e593e66f369144b9e997b Mon Sep 17 00:00:00 2001
From: Roman Titov <titovroman@gmail.com>
Date: Fri, 6 Mar 2015 17:18:43 +1000
Subject: [PATCH 1/2] flashchips: new GigaDevice chips (GD25LQ40, GD25LQ80,
 GD25LQ16, GD25LQ64(B), GD25LQ128)

Signed-off-by: Roman Titov <titovroman@gmail.com>

---
 flashchips.c | 197 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++-
 1 file changed, 196 insertions(+), 1 deletion(-)

diff --git a/flashchips.c b/flashchips.c
index 8b5d1ec..31541ea 100644
--- a/flashchips.c
+++ b/flashchips.c
@@ -5466,6 +5466,123 @@  const struct flashchip flashchips[] = {

 	{
 		.vendor		= "GigaDevice",
+		.name		= "GD25LQ40",
+		.bustype	= BUS_SPI,
+		.manufacture_id	= GIGADEVICE_ID,
+		.model_id	= GIGADEVICE_GD25LQ40,
+		.total_size	= 512,
+		.page_size	= 256,
+		/* OTP: 1024B total, 256B reserved; read 0x48; write 0x42, erase 0x44 */
+		.feature_bits	= FEATURE_WRSR_WREN | FEATURE_OTP,
+		.tested		= TEST_OK_PREW,
+		.probe		= probe_spi_rdid,
+		.probe_timing	= TIMING_ZERO,
+		.block_erasers	=
+		{
+			{
+				.eraseblocks = { {4 * 1024, 128} },
+				.block_erase = spi_block_erase_20,
+			}, {
+				.eraseblocks = { {32 * 1024, 16} },
+				.block_erase = spi_block_erase_52,
+			}, {
+				.eraseblocks = { {64 * 1024, 8} },
+				.block_erase = spi_block_erase_d8,
+			}, {
+				.eraseblocks = { {512 * 1024, 1} },
+				.block_erase = spi_block_erase_60,
+			}, {
+				.eraseblocks = { {512 * 1024, 1} },
+				.block_erase = spi_block_erase_c7,
+			}
+		},
+		.printlock	= spi_prettyprint_status_register_bp4_srwd,
+		.unlock		= spi_disable_blockprotect_bp4_srwd, /* TODO: 2nd status reg (read with 0x35) */
+		.write		= spi_chip_write_256,
+		.read		= spi_chip_read,
+		.voltage	= {1700, 1950},
+	},
+
+	{
+		.vendor		= "GigaDevice",
+		.name		= "GD25LQ80",
+		.bustype	= BUS_SPI,
+		.manufacture_id	= GIGADEVICE_ID,
+		.model_id	= GIGADEVICE_GD25LQ80,
+		.total_size	= 1024,
+		.page_size	= 256,
+		/* OTP: 1024B total, 256B reserved; read 0x48; write 0x42, erase 0x44 */
+		.feature_bits	= FEATURE_WRSR_WREN | FEATURE_OTP,
+		.tested		= TEST_OK_PREW,
+		.probe		= probe_spi_rdid,
+		.probe_timing	= TIMING_ZERO,
+		.block_erasers	=
+		{
+			{
+				.eraseblocks = { {4 * 1024, 256} },
+				.block_erase = spi_block_erase_20,
+			}, {
+				.eraseblocks = { {32 * 1024, 32} },
+				.block_erase = spi_block_erase_52,
+			}, {
+				.eraseblocks = { {64 * 1024, 16} },
+				.block_erase = spi_block_erase_d8,
+			}, {
+				.eraseblocks = { {1 * 1024 * 1024, 1} },
+				.block_erase = spi_block_erase_60,
+			}, {
+				.eraseblocks = { {1 * 1024 * 1024, 1} },
+				.block_erase = spi_block_erase_c7,
+			}
+		},
+		.printlock	= spi_prettyprint_status_register_bp4_srwd,
+		.unlock		= spi_disable_blockprotect_bp4_srwd, /* TODO: 2nd status reg (read with 0x35) */
+		.write		= spi_chip_write_256,
+		.read		= spi_chip_read,
+		.voltage	= {1700, 1950},
+	},
+
+	{
+		.vendor		= "GigaDevice",
+		.name		= "GD25LQ16",
+		.bustype	= BUS_SPI,
+		.manufacture_id	= GIGADEVICE_ID,
+		.model_id	= GIGADEVICE_GD25LQ16,
+		.total_size	= 2048,
+		.page_size	= 256,
+		/* OTP: 1024B total, 256B reserved; read 0x48; write 0x42, erase 0x44 */
+		.feature_bits	= FEATURE_WRSR_WREN | FEATURE_OTP,
+		.tested		= TEST_OK_PREW,
+		.probe		= probe_spi_rdid,
+		.probe_timing	= TIMING_ZERO,
+		.block_erasers	=
+		{
+			{
+				.eraseblocks = { {4 * 1024, 512} },
+				.block_erase = spi_block_erase_20,
+			}, {
+				.eraseblocks = { {32 * 1024, 64} },
+				.block_erase = spi_block_erase_52,
+			}, {
+				.eraseblocks = { {64 * 1024, 32} },
+				.block_erase = spi_block_erase_d8,
+			}, {
+				.eraseblocks = { {2 * 1024 * 1024, 1} },
+				.block_erase = spi_block_erase_60,
+			}, {
+				.eraseblocks = { {2 * 1024 * 1024, 1} },
+				.block_erase = spi_block_erase_c7,
+			}
+		},
+		.printlock	= spi_prettyprint_status_register_bp4_srwd,
+		.unlock		= spi_disable_blockprotect_bp4_srwd, /* TODO: 2nd status reg (read with 0x35) */
+		.write		= spi_chip_write_256,
+		.read		= spi_chip_read,
+		.voltage	= {1700, 1950},
+	},
+
+	{
+		.vendor		= "GigaDevice",
 		.name		= "GD25LQ32",
 		.bustype	= BUS_SPI,
 		.manufacture_id	= GIGADEVICE_ID,
@@ -5505,6 +5622,84 @@  const struct flashchip flashchips[] = {

 	{
 		.vendor		= "GigaDevice",
+		.name		= "GD25LQ64(B)",
+		.bustype	= BUS_SPI,
+		.manufacture_id	= GIGADEVICE_ID,
+		.model_id	= GIGADEVICE_GD25LQ64,
+		.total_size	= 8192,
+		.page_size	= 256,
+		/* OTP: 1024B total, 256B reserved; read 0x48; write 0x42, erase 0x44 */
+		.feature_bits	= FEATURE_WRSR_WREN | FEATURE_OTP,
+		.tested		= TEST_OK_PREW,
+		.probe		= probe_spi_rdid,
+		.probe_timing	= TIMING_ZERO,
+		.block_erasers	=
+		{
+			{
+				.eraseblocks = { {4 * 1024, 2048} },
+				.block_erase = spi_block_erase_20,
+			}, {
+				.eraseblocks = { {32 * 1024, 256} },
+				.block_erase = spi_block_erase_52,
+			}, {
+				.eraseblocks = { {64 * 1024, 128} },
+				.block_erase = spi_block_erase_d8,
+			}, {
+				.eraseblocks = { {8 * 1024 * 1024, 1} },
+				.block_erase = spi_block_erase_60,
+			}, {
+				.eraseblocks = { {8 * 1024 * 1024, 1} },
+				.block_erase = spi_block_erase_c7,
+			}
+		},
+		.printlock	= spi_prettyprint_status_register_bp4_srwd,
+		.unlock		= spi_disable_blockprotect_bp4_srwd, /* TODO: 2nd status reg (read with 0x35) */
+		.write		= spi_chip_write_256,
+		.read		= spi_chip_read,
+		.voltage	= {1700, 1950},
+	},
+
+	{
+		.vendor		= "GigaDevice",
+		.name		= "GD25LQ128",
+		.bustype	= BUS_SPI,
+		.manufacture_id	= GIGADEVICE_ID,
+		.model_id	= GIGADEVICE_GD25LQ128,
+		.total_size	= 16384,
+		.page_size	= 256,
+		/* OTP: 1024B total, 256B reserved; read 0x48; write 0x42, erase 0x44 */
+		.feature_bits	= FEATURE_WRSR_WREN | FEATURE_OTP,
+		.tested		= TEST_OK_PREW,
+		.probe		= probe_spi_rdid,
+		.probe_timing	= TIMING_ZERO,
+		.block_erasers	=
+		{
+			{
+				.eraseblocks = { {4 * 1024, 4096} },
+				.block_erase = spi_block_erase_20,
+			}, {
+				.eraseblocks = { {32 * 1024, 512} },
+				.block_erase = spi_block_erase_52,
+			}, {
+				.eraseblocks = { {64 * 1024, 256} },
+				.block_erase = spi_block_erase_d8,
+			}, {
+				.eraseblocks = { {16 * 1024 * 1024, 1} },
+				.block_erase = spi_block_erase_60,
+			}, {
+				.eraseblocks = { {16 * 1024 * 1024, 1} },
+				.block_erase = spi_block_erase_c7,
+			}
+		},
+		.printlock	= spi_prettyprint_status_register_bp4_srwd,
+		.unlock		= spi_disable_blockprotect_bp4_srwd, /* TODO: 2nd status reg (read with 0x35) */
+		.write		= spi_chip_write_256,
+		.read		= spi_chip_read,
+		.voltage	= {1700, 1950},
+	},
+
+	{
+		.vendor		= "GigaDevice",
 		.name		= "GD25Q512",
 		.bustype	= BUS_SPI,
 		.manufacture_id	= GIGADEVICE_ID,
@@ -14910,7 +15105,7 @@  const struct flashchip flashchips[] = {
 		.read		= read_memmapped,
 		.voltage	= {3000, 3600}, /* Also has 12V fast program */
 	},
-
+
 	{
 		.vendor		= "Unknown",
 		.name		= "SFDP-capable chip",
--
2.3.1