From patchwork Sat Oct 17 14:23:28 2009
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Subject: ifdef & config problems
Date: Sat, 17 Oct 2009 14:23:28 -0000
From: Myles Watson <mylesgw@gmail.com>
X-Patchwork-Id: 433
Message-Id: <2831fecf0910170723p3f8ea175ubbcafe642aa80218@mail.gmail.com>
To: coreboot <coreboot@coreboot.org>

Try to make CONFIG_ options more standard.

config_console.diff: #ifdef->#if
fan_ctl.diff: make CONFIG_HAVE_FANCTL specific to the SuperIO that supports
it
vt8237r.diff: #ifdef->#if

Config options used with #ifdef makes it so your board can break silently
when someone makes a simple change in Kconfig.

Signed-off-by: Myles Watson <mylesgw@gmail.com>

Thanks,
Myles
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>


Index: cbv2/src/config/Options.lb
===================================================================
--- cbv2.orig/src/config/Options.lb
+++ cbv2/src/config/Options.lb
@@ -712,8 +712,8 @@ define CONFIG_PCIBIOS_IRQ
 	comment "PCIBIOS IRQ support"
 end
 define CONFIG_IOAPIC
-	default none
-	export used
+	default 0
+	export always
 	comment "IOAPIC support"
 end
 
@@ -1103,14 +1103,14 @@ define CONFIG_K8_MEM_BANK_B_ONLY
 end
 
 define CONFIG_VIDEO_MB
-        default none
-        export used
+        default 0
+        export always
         comment "Integrated graphics with UMA has dynamic setup"
 end
 
 define CONFIG_GFXUMA
-        default none
-        export used
+        default 0
+        export always
         comment "GFX UMA"
 end
 
Index: cbv2/src/cpu/x86/mtrr/mtrr.c
===================================================================
--- cbv2.orig/src/cpu/x86/mtrr/mtrr.c
+++ cbv2/src/cpu/x86/mtrr/mtrr.c
@@ -37,7 +37,7 @@
 #include <cpu/x86/mtrr.h>
 #include <cpu/x86/cache.h>
 
-#ifdef CONFIG_GFXUMA
+#if CONFIG_GFXUMA
 extern uint64_t uma_memory_base, uma_memory_size;
 #endif
 
Index: cbv2/src/northbridge/amd/amdk8/northbridge.c
===================================================================
--- cbv2.orig/src/northbridge/amd/amdk8/northbridge.c
+++ cbv2/src/northbridge/amd/amdk8/northbridge.c
@@ -357,7 +357,7 @@ static void amdk8_link_read_bases(device
 		resource->gran  = log2(HT_MEM_HOST_ALIGN);
 		resource->limit = 0xffffffffffULL;
 		resource->flags = IORESOURCE_MEM | IORESOURCE_PREFETCH;
-#ifdef CONFIG_PCI_64BIT_PREF_MEM
+#if CONFIG_PCI_64BIT_PREF_MEM
 		resource->flags |= IORESOURCE_BRIDGE;
 #endif
 	}
Index: cbv2/src/northbridge/intel/i82810/northbridge.c
===================================================================
--- cbv2.orig/src/northbridge/intel/i82810/northbridge.c
+++ cbv2/src/northbridge/intel/i82810/northbridge.c
@@ -147,7 +147,7 @@ static void pci_domain_set_resources(dev
 		/* Convert tomk from MB to KB. */
 		tomk = tomk << 10;
 
-#ifdef CONFIG_VIDEO_MB
+#if CONFIG_VIDEO_MB
 		/* Check for VGA reserved memory. */
 		if (CONFIG_VIDEO_MB == 512) {
 			tomk -= 512;
Index: cbv2/src/northbridge/intel/i82810/raminit.c
===================================================================
--- cbv2.orig/src/northbridge/intel/i82810/raminit.c
+++ cbv2/src/northbridge/intel/i82810/raminit.c
@@ -371,7 +371,7 @@ static void sdram_set_registers(void)
 	/* Set size for onboard-VGA framebuffer. */
 	reg8 = pci_read_config8(PCI_DEV(0, 0, 0), SMRAM);
 	reg8 &= 0x3f;			     /* Disable graphics (for now). */
-#ifdef CONFIG_VIDEO_MB
+#if CONFIG_VIDEO_MB
 	if (CONFIG_VIDEO_MB == 512)
 		reg8 |= (1 << 7);	     /* Enable graphics (512KB RAM). */
 	else if (CONFIG_VIDEO_MB == 1)
Index: cbv2/src/northbridge/via/cx700/cx700_lpc.c
===================================================================
--- cbv2.orig/src/northbridge/via/cx700/cx700_lpc.c
+++ cbv2/src/northbridge/via/cx700/cx700_lpc.c
@@ -37,7 +37,7 @@
 #define HPET_ADDR	0xfe800000UL
 #define IOAPIC_ADDR	0xfec00000ULL
 
-#ifdef CONFIG_IOAPIC
+#if CONFIG_IOAPIC
 struct ioapicreg {
 	unsigned int reg;
 	unsigned int value_low, value_high;
@@ -368,7 +368,7 @@ static void cx700_lpc_init(struct device
 {
 	cx700_set_lpc_registers(dev);
 
-#ifdef CONFIG_IOAPIC
+#if CONFIG_IOAPIC
 	setup_ioapic();
 #endif