Patchwork Add support for SST39LF010, SST39LF020 and SST39LF040

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Submitter Hatim Kanchwala
Date 2016-03-07 17:59:18
Message ID <1457373558-22716-1-git-send-email-hatim@hatimak.me>
Download mbox | patch
Permalink /patch/4416/
State New
Headers show

Comments

Hatim Kanchwala - 2016-03-07 17:59:18
Hello,

I am learning about parallel flash chips. My approach is to go through datasheets of chips supported by flashrom and then add support for other member chips of the family. AFAIK, following three chips differ from VF variants only in voltage range. I was able to find very little about parallel flash on the internet, so I will continue with this approach (what do you guys think? :P). If you have any resources or any particular parallel chip family in mind, please let me know (via mail or IRC ;)).

Thanks! :)

Signed-off-by: Hatim Kanchwala <hatim@hatimak.me>
---
 flashchips.c | 81 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
 flashchips.h |  6 ++---
 2 files changed, 84 insertions(+), 3 deletions(-)

Patch

diff --git a/flashchips.c b/flashchips.c
index 0fc1b7a..b8fff3c 100644
--- a/flashchips.c
+++ b/flashchips.c
@@ -12862,26 +12862,107 @@  const struct flashchip flashchips[] = {
 		{
 			{
 				.eraseblocks = { {256 * 1024, 1} },
 				.block_erase = erase_chip_block_jedec,
 			}
 		},
 		.write		= write_jedec,
 		.read		= read_memmapped,
 		.voltage	= {3000, 3600},
 	},
 
 	{
 		.vendor		= "SST",
+		.name		= "SST39LF010",
+		.bustype	= BUS_PARALLEL,
+		.manufacture_id	= SST_ID,
+		.model_id	= SST_SST39VF010,
+		.total_size	= 128,
+		.page_size	= 4096,
+		.feature_bits	= FEATURE_EITHER_RESET,
+		.tested		= TEST_UNTESTED,
+		.probe		= probe_jedec,
+		.probe_timing	= 1,		/* 150 ns */
+		.block_erasers	=
+		{
+			{
+				.eraseblocks = { {4 * 1024, 32} },
+				.block_erase = erase_sector_jedec,
+			}, {
+				.eraseblocks = { {128 * 1024, 1} },
+				.block_erase = erase_chip_block_jedec,
+			}
+		},
+		.write		= write_jedec_1,
+		.read		= read_memmapped,
+		.voltage	= {3000, 3600},
+	},
+
+	{
+		.vendor		= "SST",
+		.name		= "SST39LF020",
+		.bustype	= BUS_PARALLEL,
+		.manufacture_id	= SST_ID,
+		.model_id	= SST_SST39VF020,
+		.total_size	= 256,
+		.page_size	= 4096,
+		.feature_bits	= FEATURE_EITHER_RESET,
+		.tested		= TEST_UNTESTED,
+		.probe		= probe_jedec,
+		.probe_timing	= 1,		/* 150 ns */
+		.block_erasers	=
+		{
+			{
+				.eraseblocks = { {4 * 1024, 64} },
+				.block_erase = erase_sector_jedec,
+			}, {
+				.eraseblocks = { {256 * 1024, 1} },
+				.block_erase = erase_chip_block_jedec,
+			}
+		},
+		.write		= write_jedec_1,
+		.read		= read_memmapped,
+		.voltage	= {3000, 3600},
+	},
+
+	{
+		.vendor		= "SST",
+		.name		= "SST39LF040",
+		.bustype	= BUS_PARALLEL,
+		.manufacture_id	= SST_ID,
+		.model_id	= SST_SST39VF040,
+		.total_size	= 512,
+		.page_size	= 4096,
+		.feature_bits	= FEATURE_EITHER_RESET,
+		.tested		= TEST_UNTESTED,
+		.probe		= probe_jedec,
+		.probe_timing	= 1,		/* 150 ns */
+		.block_erasers	=
+		{
+			{
+				.eraseblocks = { {4 * 1024, 128} },
+				.block_erase = erase_sector_jedec,
+			}, {
+				.eraseblocks = { {512 * 1024, 1} },
+				.block_erase = erase_chip_block_jedec,
+			}
+		},
+		.write		= write_jedec_1,
+		.read		= read_memmapped,
+		.voltage	= {3000, 3600},
+	},
+
+	{
+		.vendor		= "SST",
 		.name		= "SST39SF512",
 		.bustype	= BUS_PARALLEL,
 		.manufacture_id	= SST_ID,
 		.model_id	= SST_SST39SF512,
 		.total_size	= 64,
 		.page_size	= 4096,
 		.feature_bits	= FEATURE_EITHER_RESET,
 		.tested		= TEST_OK_PREW,
 		.probe		= probe_jedec,
 		.probe_timing	= 1,			/* 150 ns */
 		.block_erasers	=
 		{
 			{
diff --git a/flashchips.h b/flashchips.h
index 9ffb30f..3d61ad1 100644
--- a/flashchips.h
+++ b/flashchips.h
@@ -709,29 +709,29 @@ 
 #define SST_SST29EE010		0x07
 #define SST_SST29LE010		0x08	/* Same as SST29VE010 */
 #define SST_SST29EE020A		0x10	/* Same as SST29EE020 */
 #define SST_SST29LE020		0x12	/* Same as SST29VE020 */
 #define SST_SST29SF020		0x24
 #define SST_SST29VF020		0x25
 #define SST_SST29SF040		0x13
 #define SST_SST29VF040		0x14
 #define SST_SST39SF512		0xB4
 #define SST_SST39SF010		0xB5
 #define SST_SST39SF020		0xB6	/* Same as 39SF020A */
 #define SST_SST39SF040		0xB7
 #define SST_SST39VF512		0xD4
-#define SST_SST39VF010		0xD5
-#define SST_SST39VF020		0xD6	/* Same as 39LF020 */
-#define SST_SST39VF040		0xD7	/* Same as 39LF040 */
+#define SST_SST39VF010		0xD5	/* Same as SST39LF010 */
+#define SST_SST39VF020		0xD6	/* Same as SST39LF020 */
+#define SST_SST39VF040		0xD7	/* Same as SST39LF040 */
 #define SST_SST39VF080		0xD8	/* Same as 39LF080/39VF080/39VF088 */
 #define SST_SST45VF512		0x41	/* REMS, read opcode 0xFF */
 #define SST_SST45LF010		0x42	/* REMS, read opcode 0xFF, 'funny' other opcodes */
 #define SST_SST45VF010		0x45	/* REMS, read opcode 0xFF */
 #define SST_SST45VF020		0x43	/* REMS, read opcode 0xFF */
 #define SST_SST49LF040B		0x50
 #define SST_SST49LF040		0x51
 #define SST_SST49LF020		0x61
 #define SST_SST49LF020A		0x52
 #define SST_SST49LF030A		0x1C
 #define SST_SST49LF080A		0x5B
 #define SST_SST49LF002A		0x57
 #define SST_SST49LF003A		0x1B