Submitter | Sean Boree |
---|---|
Date | 2016-03-26 23:45:01 |
Message ID | <CAG95n-+qiD=K3hoCtjjkr5mEKDkd+px=-S3AK_u0qXvrXhN0Eg@mail.gmail.com> |
Download | mbox | patch |
Permalink | /patch/4432/ |
State | New |
Headers | show |
Comments
Dear Sean, Thanks for your patch. Here's a few issues I found - 1. For patches that touch struct flashchip it is wise to include more context lines. Have a look here (https://www.flashrom.org/Development_Guidelines#Patch_submission). 2. Tabs were converted to spaces. You can have a look at the AT25F512 entry just below it to understand the differences. 3. Regarding total_size, we write it usually as "x * 1024" that is to be read as "x kB". 4. This particular chip supports dual and quad I/O, so the FEATURE_QPI bit should be set and you can also include a comment. Just have a look at other entries in flashchips.c. 5. IMHO, the FIXME comment in spi25_statusreg.c should only come at spi_prettyprint_status_register_at25df_sec and not spi_prettyprint_status_register_at25df, because AT25DQ321 really uses only the former. Apart from the above, the content looks fine to me. Thanks for the patch. :) Acked-by: Hatim Kanchwala <hatim@hatimak.me> On Sunday 27 March 2016 05:15 AM, sean boree wrote: > This patch adds support for the AT25DQ321 chip, as this is my first patch, I apologise > for any rookie mistakes I made. > > > Signed-off-by: Sean Boree <seanboree@gmail.com <mailto:seanboree@gmail.com>> > > > > _______________________________________________ > flashrom mailing list > flashrom@flashrom.org > https://www.flashrom.org/mailman/listinfo/flashrom >
Patch
diff --git a/flashchips.c b/flashchips.c index 40b6b8e..05c200f 100644 --- a/flashchips.c +++ b/flashchips.c @@ -1907,6 +1907,45 @@ const struct flashchip flashchips[] = { { .vendor = "Atmel", + .name = "AT25DQ321", + .bustype = BUS_SPI, + .manufacture_id = ATMEL_ID, + .model_id = ATMEL_AT25DQ321, + .total_size = 4096, + .page_size = 256, + /* OTP: 128B total, 64B pre-programmed; read 0x77; write 0x9B */ + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP, + .tested = TEST_UNTESTED, + .probe = probe_spi_rdid, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 1024} }, + .block_erase = spi_block_erase_20, + }, { + .eraseblocks = { {32 * 1024, 128} }, + .block_erase = spi_block_erase_52, + }, { + .eraseblocks = { {64 * 1024, 64} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {4 * 1024 * 1024, 1} }, + .block_erase = spi_block_erase_60, + }, { + .eraseblocks = { {4 * 1024 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, + .printlock = spi_prettyprint_status_register_at25df_sec, + .unlock = spi_disable_blockprotect_at2x_global_unprotect_sec, + .write = spi_chip_write_256, + .read = spi_chip_read, + .voltage = {2700, 3600}, + }, + + { + .vendor = "Atmel", .name = "AT25F512", .bustype = BUS_SPI, .manufacture_id = ATMEL_ID, diff --git a/spi25_statusreg.c b/spi25_statusreg.c index 01a6862..99bb15a 100644 --- a/spi25_statusreg.c +++ b/spi25_statusreg.c @@ -452,6 +452,7 @@ static void spi_prettyprint_status_register_atmel_at25_swp(uint8_t status) } } +/* FIXME: currently also used by AT25DQxxx and AT25DLxxx (renaming might be in order) */ int spi_prettyprint_status_register_at25df(struct flashctx *flash) { uint8_t status = spi_read_status_register(flash); @@ -465,6 +466,7 @@ int spi_prettyprint_status_register_at25df(struct flashctx *flash) return 0; } +/* FIXME: currently also used by AT25DQxxx and AT25DLxxx (renaming might be in order) */ int spi_prettyprint_status_register_at25df_sec(struct flashctx *flash) { /* FIXME: We should check the security lockdown. */
This patch adds support for the AT25DQ321 chip, as this is my first patch, I apologise for any rookie mistakes I made. Signed-off-by: Sean Boree <seanboree@gmail.com>