Patchwork Add support for GD25Q21B, GD25Q41B, GD25Q80C and GD25Q16C

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Submitter Hatim Kanchwala
Date 2016-04-04 11:36:03
Message ID <1459769763-7949-1-git-send-email-hatim@hatimak.me>
Download mbox | patch
Permalink /patch/4435/
State New
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Comments

Hatim Kanchwala - 2016-04-04 11:36:03
Hello,

This patch supersedes the corresponding one I sent earlier as part of a chain (http://patchwork.coreboot.org/patch/4420). Stefan's suggestions on previous patches (discussed on list and IRC) are incorporated. The new definitions are combined with their counterparts.

Thanks. :)

Signed-off-by: Hatim Kanchwala <hatim@hatimak.me>
---
 flashchips.c | 28 ++++++++++++++++------------
 flashchips.h |  4 ++--
 2 files changed, 18 insertions(+), 14 deletions(-)

Patch

diff --git a/flashchips.c b/flashchips.c
index 40b6b8e..7947256 100644
--- a/flashchips.c
+++ b/flashchips.c
@@ -5933,37 +5933,38 @@  const struct flashchip flashchips[] = {
 				.block_erase = spi_block_erase_60,
 			}, {
 				.eraseblocks = { {128 * 1024, 1} },
 				.block_erase = spi_block_erase_c7,
 			}
 		},
 		.printlock	= spi_prettyprint_status_register_bp4_srwd,
 		.unlock		= spi_disable_blockprotect_bp4_srwd, /* TODO: 2nd status reg (read with 0x35) */
 		.write		= spi_chip_write_256,
 		.read		= spi_chip_read, /* Fast read (0x0B) and multi I/O supported */
 		.voltage	= {2700, 3600},
 	},
 
 	{
 		.vendor		= "GigaDevice",
-		.name		= "GD25Q20(B)",
+		.name		= "GD25Q20(B)/GD25Q21B",
 		.bustype	= BUS_SPI,
 		.manufacture_id	= GIGADEVICE_ID,
 		.model_id	= GIGADEVICE_GD25Q20,
 		.total_size	= 256,
 		.page_size	= 256,
-		.feature_bits	= FEATURE_WRSR_WREN,
+		/* OTP (GD25Q21B only): 1536B total; read 0x48, write 0x42, erase 0x44 */
+		.feature_bits	= FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_QPI,
 		.tested		= TEST_OK_PREW,
 		.probe		= probe_spi_rdid,
 		.probe_timing	= TIMING_ZERO,
 		.block_erasers	=
 		{
 			{
 				.eraseblocks = { {4 * 1024, 64} },
 				.block_erase = spi_block_erase_20,
 			}, {
 				.eraseblocks = { {32 * 1024, 8} },
 				.block_erase = spi_block_erase_52,
 			}, {
 				.eraseblocks = { {64 * 1024, 4} },
 				.block_erase = spi_block_erase_d8,
 			}, {
@@ -5971,76 +5972,78 @@  const struct flashchip flashchips[] = {
 				.block_erase = spi_block_erase_60,
 			}, {
 				.eraseblocks = { {256 * 1024, 1} },
 				.block_erase = spi_block_erase_c7,
 			}
 		},
 		.printlock	= spi_prettyprint_status_register_bp4_srwd,
 		.unlock		= spi_disable_blockprotect_bp4_srwd, /* TODO: 2nd status reg (read with 0x35) */
 		.write		= spi_chip_write_256,
 		.read		= spi_chip_read, /* Fast read (0x0B) and multi I/O supported */
 		.voltage	= {2700, 3600},
 	},
 
 	{
 		.vendor		= "GigaDevice",
-		.name		= "GD25Q40(B)",
+		.name		= "GD25Q40(B)/GD25Q41B",
 		.bustype	= BUS_SPI,
 		.manufacture_id	= GIGADEVICE_ID,
 		.model_id	= GIGADEVICE_GD25Q40,
 		.total_size	= 512,
 		.page_size	= 256,
-		.feature_bits	= FEATURE_WRSR_WREN,
-		.tested		= TEST_UNTESTED,
+		/* OTP (GD25Q41B only): 1536B total; read 0x48, write 0x42, erase 0x44 */
+		.feature_bits	= FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_QPI,
+		.tested		= TEST_OK_PREW,
 		.probe		= probe_spi_rdid,
 		.probe_timing	= TIMING_ZERO,
 		.block_erasers	=
 		{
 			{
 				.eraseblocks = { {4 * 1024, 128} },
 				.block_erase = spi_block_erase_20,
 			}, {
 				.eraseblocks = { {32 * 1024, 16} },
 				.block_erase = spi_block_erase_52,
 			}, {
 				.eraseblocks = { {64 * 1024, 8} },
 				.block_erase = spi_block_erase_d8,
 			}, {
 				.eraseblocks = { {512 * 1024, 1} },
 				.block_erase = spi_block_erase_60,
 			}, {
 				.eraseblocks = { {512 * 1024, 1} },
 				.block_erase = spi_block_erase_c7,
 			}
 		},
 		.printlock	= spi_prettyprint_status_register_bp4_srwd,
 		.unlock		= spi_disable_blockprotect_bp4_srwd, /* TODO: 2nd status reg (read with 0x35) */
 		.write		= spi_chip_write_256,
 		.read		= spi_chip_read, /* Fast read (0x0B) and multi I/O supported */
 		.voltage	= {2700, 3600},
 	},
 
 	{
 		.vendor		= "GigaDevice",
-		.name		= "GD25Q80(B)",
+		.name		= "GD25Q80(B)(C)",
 		.bustype	= BUS_SPI,
 		.manufacture_id	= GIGADEVICE_ID,
 		.model_id	= GIGADEVICE_GD25Q80,
 		.total_size	= 1024,
 		.page_size	= 256,
-		/* OTP: 1024B total, 256B reserved; read 0x48; write 0x42, erase 0x44 (B version only) */
-		.feature_bits	= FEATURE_WRSR_WREN | FEATURE_OTP,
+		/* OTP: 1024B total; read 0x48, write 0x42, erase 0x44 (B and C revisions only) */
+		/* supports SFDP (C revision only) */
+		.feature_bits	= FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_QPI,
 		.tested		= TEST_OK_PREW,
 		.probe		= probe_spi_rdid,
 		.probe_timing	= TIMING_ZERO,
 		.block_erasers	=
 		{
 			{
 				.eraseblocks = { {4 * 1024, 256} },
 				.block_erase = spi_block_erase_20,
 			}, {
 				.eraseblocks = { {32 * 1024, 32} },
 				.block_erase = spi_block_erase_52,
 			}, {
 				.eraseblocks = { {64 * 1024, 16} },
 				.block_erase = spi_block_erase_d8,
 			}, {
@@ -6048,38 +6051,39 @@  const struct flashchip flashchips[] = {
 				.block_erase = spi_block_erase_60,
 			}, {
 				.eraseblocks = { {1024 * 1024, 1} },
 				.block_erase = spi_block_erase_c7,
 			}
 		},
 		.printlock	= spi_prettyprint_status_register_bp4_srwd,
 		.unlock		= spi_disable_blockprotect_bp4_srwd, /* TODO: 2nd status reg (read with 0x35) */
 		.write		= spi_chip_write_256,
 		.read		= spi_chip_read, /* Fast read (0x0B) and multi I/O supported */
 		.voltage	= {2700, 3600},
 	},
 
 	{
 		.vendor		= "GigaDevice",
-		.name		= "GD25Q16(B)",
+		.name		= "GD25Q16(B)(C)",
 		.bustype	= BUS_SPI,
 		.manufacture_id	= GIGADEVICE_ID,
 		.model_id	= GIGADEVICE_GD25Q16,
-		.total_size	= 2048,
+		.total_size	= 2* 1024,
 		.page_size	= 256,
-		/* OTP: 1024B total, 256B reserved; read 0x48; write 0x42, erase 0x44 (B version only) */
-		.feature_bits	= FEATURE_WRSR_WREN | FEATURE_OTP,
+		/* OTP: 1024B total; read 0x48, write 0x42, erase 0x44 (B and C revisions only) */
+		/* supports SFDP (C revision only) */
+		.feature_bits	= FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_QPI,
 		.tested		= TEST_OK_PREW,
 		.probe		= probe_spi_rdid,
 		.probe_timing	= TIMING_ZERO,
 		.block_erasers	=
 		{
 			{
 				.eraseblocks = { {4 * 1024, 512} },
 				.block_erase = spi_block_erase_20,
 			}, {
 				.eraseblocks = { {32 * 1024, 64} },
 				.block_erase = spi_block_erase_52,
 			}, {
 				.eraseblocks = { {64 * 1024, 32} },
 				.block_erase = spi_block_erase_d8,
 			}, {
diff --git a/flashchips.h b/flashchips.h
index 9ffb30f..997b3cb 100644
--- a/flashchips.h
+++ b/flashchips.h
@@ -353,32 +353,32 @@ 
 #define FUJITSU_MBM29LV008TA	0x3E
 #define FUJITSU_MBM29LV080A	0x38
 #define FUJITSU_MBM29LV200BC	0xBF
 #define FUJITSU_MBM29LV200TC	0x3B
 #define FUJITSU_MBM29LV400BC	0xBA
 #define FUJITSU_MBM29LV400TC	0xB9
 #define FUJITSU_MBM29LV800BA	0x5B	/* Same as MBM29LV800BE */
 #define FUJITSU_MBM29LV800TA	0xDA	/* Same as MBM29LV800TE */
 #define FUJITSU_MBM29LV160BE	0x49	/* 16 b mode 0x2249 */
 #define FUJITSU_MBM29LV160TE	0xC4	/* 16 b mode 0x22C4 */
 
 #define GIGADEVICE_ID		0xC8	/* GigaDevice */
 #define GIGADEVICE_GD25T80	0x3114
 #define GIGADEVICE_GD25Q512	0x4010
 #define GIGADEVICE_GD25Q10	0x4011
-#define GIGADEVICE_GD25Q20	0x4012	/* Same as GD25QB */
-#define GIGADEVICE_GD25Q40	0x4013	/* Same as GD25QB */
+#define GIGADEVICE_GD25Q20	0x4012	/* Same as GD25Q21B which supports OTP */
+#define GIGADEVICE_GD25Q40	0x4013	/* Same as GD25Q41B which supports OTP */
 #define GIGADEVICE_GD25Q80	0x4014	/* Same as GD25Q80B (which has OTP) */
 #define GIGADEVICE_GD25Q16	0x4015	/* Same as GD25Q16B (which has OTP) */
 #define GIGADEVICE_GD25Q32	0x4016	/* Same as GD25Q32B */
 #define GIGADEVICE_GD25Q64	0x4017	/* Same as GD25Q64B */
 #define GIGADEVICE_GD25Q128	0x4018	/* GD25Q128B and GD25Q128C only, can be distinguished by SFDP */
 #define GIGADEVICE_GD25VQ21B	0x4212
 #define GIGADEVICE_GD25VQ41B	0x4213  /* Same as GD25VQ40C, can be distinguished by SFDP */
 #define GIGADEVICE_GD25VQ80C	0x4214
 #define GIGADEVICE_GD25VQ16C	0x4215
 #define GIGADEVICE_GD25LQ40	0x6013
 #define GIGADEVICE_GD25LQ80	0x6014
 #define GIGADEVICE_GD25LQ16	0x6015
 #define GIGADEVICE_GD25LQ32	0x6016
 #define GIGADEVICE_GD25LQ64	0x6017	/* Same as GD25LQ64B (which is faster) */
 #define GIGADEVICE_GD25LQ128	0x6018