Submitter | Nico Huber |
---|---|
Date | 2018-05-11 14:47:39 |
Message ID | <1df042ab-bdce-3f29-572c-5a76f3eed08e@gmx.de> |
Download | mbox | patch |
Permalink | /patch/4525/ |
State | New |
Headers | show |
Comments
Hello Nico, thank you very much! I'll try the patch as soon as possible, meaning when the next BIOS update is released and give you the corresponding feedback. Kind regards and have a nice weekend, Hubert On 05/11/2018 04:47 PM, Nico Huber wrote: > Hello Hubert, > > you'll find a patch attached and here [1]. If you do test it, please > always keep a verbose log (e.g. using flashrom's `-o logfile` option), > so we can mark your chipset as tested if it works, or help you out if > not;) > > Let me know if you need help applying the patch and compiling flashrom. > > Some remarks on flashing your system (generally applies to modern Intel > systems): > - If Lenovo enforced some write-protection (they do on their Think- > Pads), you won't be able flash (the whole) firmware. > - You'll need a full BIOS image that can be directly flashed, e.g. not > just an update that only contains changed portions. OEMs sometimes > only provide the latter. > - The "BIOS" flash is usually shared with the Management Engine (ME). > If configured correctly, you can't access the ME parts of the flash. > You can add these options to make flashrom only access the BIOS > region: `--ifd -i BIOS -N`. > And additionally `-p internal:ich_spi_force=yes` if you want to > write. > - Always make a backup first. > > Nico > > PS. Please always keep the mailing list in CC. > > [1
Patch
From b69ef2ff943372bea7f3b27cdd89e42057d9ab90 Mon Sep 17 00:00:00 2001 From: Nico Huber <nico.huber@secunet.com> Date: Mon, 20 Mar 2017 14:25:09 +0100 Subject: [PATCH] chipset_enable: Add PCI IDs for discrete Kaby Lake PCHs MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The Kaby Lake "200 Series" PCHs [1,2] share the register layout of their Skylake "100 Series" siblings. [1] IntelĀ® 200 Series (including X299) Chipset Family Platform Controller Hub (PCH) Datasheet - Volume 1 of 2 Revision 002 Document Number 335192 [2] IntelĀ® 200 Series (including X299) Chipset Family Platform Controller Hub (PCH) Datasheet - Volume 2 of 2 Revision 003 Document Number 335193 Change-Id: Ida545d69ec998a5d3ae4dc88e76adbb13952bceb Signed-off-by: Nico Huber <nico.h@gmx.de> --- chipset_enable.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/chipset_enable.c b/chipset_enable.c index 15b760ba..72d5de0d 100644 --- a/chipset_enable.c +++ b/chipset_enable.c @@ -1945,6 +1945,12 @@ const struct penable chipset_enables[] = { {0x8086, 0xa245, NT, "Intel", "C627 Series Chipset Supersku", enable_flash_c620}, {0x8086, 0xa246, NT, "Intel", "C628 Series Chipset Supersku", enable_flash_c620}, {0x8086, 0xa247, NT, "Intel", "C620 Series Chipset Supersku", enable_flash_c620}, + {0x8086, 0xa2c4, NT, "Intel", "H270", enable_flash_pch100}, + {0x8086, 0xa2c5, NT, "Intel", "Z270", enable_flash_pch100}, + {0x8086, 0xa2c6, NT, "Intel", "Q270", enable_flash_pch100}, + {0x8086, 0xa2c7, NT, "Intel", "Q250", enable_flash_pch100}, + {0x8086, 0xa2c8, NT, "Intel", "B250", enable_flash_pch100}, + {0x8086, 0xa2d2, NT, "Intel", "X299", enable_flash_pch100}, #endif {0}, }; -- 2.17.0