| Submitter | Uwe Hermann |
|---|---|
| Date | 2009-10-25 18:16:23 |
| Message ID | <20091025181623.GV22827@greenwood> |
| Download | mbox | patch |
| Permalink | /patch/488/ |
| State | Accepted |
| Commit | r4858 |
| Headers | show |
Comments
Uwe Hermann wrote: > On Sun, Oct 25, 2009 at 03:08:49PM +0100, Peter Stuge wrote: > >> Stefan Reinauer wrote: >> >>> Use Intel Core code for eagleheights CAR init, not Intel Core 2, as >>> any of the CPUs might be used. >>> >>> Signed-off-by: Stefan Reinauer <stepan@coresystems.de> >>> >> Acked-by: Peter Stuge <peter@stuge.se> >> > > Acked-by: Uwe Hermann <uwe@hermann-uwe.de> > > But maybe add a comment to permanently document the choice and the > reasons for it in the code / build files. Example patch attached. > > For some reason your patch didn't seem to apply here. But feel free to add it on top of r4854. Acked-by: Stefan Reinauer <stepan@coresystems.de>
Patch
Use Intel Core code for eagleheights CAR init, not Intel Core 2, as any of the CPUs might be used. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Index: src/mainboard/intel/eagleheights/Makefile.inc =================================================================== --- src/mainboard/intel/eagleheights/Makefile.inc (Revision 4851) +++ src/mainboard/intel/eagleheights/Makefile.inc (Arbeitskopie) @@ -14,6 +14,7 @@ crt0-y += ../../../../src/cpu/x86/32bit/entry32.inc crt0-y += ../../../../src/cpu/x86/16bit/reset16.inc crt0-y += ../../../../src/arch/i386/lib/id.inc +# Use Intel Core (not Core 2) code for CAR init, any CPU might be used. crt0-y += ../../../../src/cpu/intel/model_6ex/cache_as_ram.inc crt0-y += auto.inc Index: src/mainboard/intel/eagleheights/auto.c =================================================================== --- src/mainboard/intel/eagleheights/auto.c (Revision 4851) +++ src/mainboard/intel/eagleheights/auto.c (Arbeitskopie) @@ -238,4 +238,5 @@ sdram_initialize(ARRAY_SIZE(mch), mch); } -#include "cpu/intel/model_6fx/cache_as_ram_disable.c" +/* Use Intel Core (not Core 2) code for CAR init, any CPU might be used. */ +#include "cpu/intel/model_6ex/cache_as_ram_disable.c" Index: src/mainboard/intel/eagleheights/Config.lb =================================================================== --- src/mainboard/intel/eagleheights/Config.lb (Revision 4851) +++ src/mainboard/intel/eagleheights/Config.lb (Arbeitskopie) @@ -109,7 +109,8 @@ ## ## Setup Cache-As-Ram ## -mainboardinit cpu/intel/model_6fx/cache_as_ram.inc +## Use Intel Core (not Core 2) code for CAR init, any CPU might be used. +mainboardinit cpu/intel/model_6ex/cache_as_ram.inc ### ### This is the early phase of coreboot startup