Patchwork Drop all pre-CBFS rom_address entries in Config.lb/devicetree.cb

login
register
about
Submitter Uwe Hermann
Date 2009-10-28 19:58:21
Message ID <20091028195821.GC22827@greenwood>
Download mbox | patch
Permalink /patch/505/
State Accepted
Headers show

Comments

Uwe Hermann - 2009-10-28 19:58:21
See patch.


Uwe.
Myles Watson - 2009-10-28 20:18:57
On Wed, Oct 28, 2009 at 1:58 PM, Uwe Hermann <uwe@hermann-uwe.de> wrote:

> See patch.
>
I think it would be nice to figure out what we do with the "onboard" device
at the same time.

 from src/drivers/pci/onboard.c:

static void onboard_enable(device_t dev)
{
    struct drivers_pci_onboard_config *conf;
        conf = dev->chip_info;
    dev->rom_address = conf->rom_address;
}

Does it make sense to change ROM handling so that only "onboard" devices can
have their ROMs run?  That's the way it used to be, right?

Otherwise, maybe we don't need onboard anymore at all?

Thanks,
Myles
Peter Stuge - 2009-10-30 01:55:10
Myles Watson wrote:
> Otherwise, maybe we don't need onboard anymore at all?

Is it used for anything but the option ROM?


//Peter
Myles Watson - 2009-10-30 02:01:18
On Thu, Oct 29, 2009 at 7:55 PM, Peter Stuge <peter@stuge.se> wrote:

> Myles Watson wrote:
> > Otherwise, maybe we don't need onboard anymore at all?
>
> Is it used for anything but the option ROM?
>
Not that I can tell.  There's not much code there.

Thanks,
Myles
Myles Watson - 2009-11-05 17:42:35
On Wed, Oct 28, 2009 at 2:18 PM, Myles Watson <mylesgw@gmail.com> wrote:

>
>
> On Wed, Oct 28, 2009 at 1:58 PM, Uwe Hermann <uwe@hermann-uwe.de> wrote:
>
>> See patch.
>>
> I think it would be nice to figure out what we do with the "onboard" device
> at the same time.
>
Ping.  I think this patch is an improvement, but I didn't want the
opportunity to remove more dead code pass by.  Any comments?

 from src/drivers/pci/onboard.c:
>
> static void onboard_enable(device_t dev)
> {
>     struct drivers_pci_onboard_config *conf;
>         conf = dev->chip_info;
>     dev->rom_address = conf->rom_address;
> }
>
> Does it make sense to change ROM handling so that only "onboard" devices
> can have their ROMs run?  That's the way it used to be, right?
>
> Otherwise, maybe we don't need onboard anymore at all?
>

Thanks,
Myles
Stefan Reinauer - 2009-11-05 18:12:54
Myles Watson wrote:
>
>
> On Wed, Oct 28, 2009 at 2:18 PM, Myles Watson <mylesgw@gmail.com
> <mailto:mylesgw@gmail.com>> wrote:
>
>
>
>     On Wed, Oct 28, 2009 at 1:58 PM, Uwe Hermann <uwe@hermann-uwe.de
>     <mailto:uwe@hermann-uwe.de>> wrote:
>
>         See patch.
>
>     I think it would be nice to figure out what we do with the
>     "onboard" device at the same time.
>
> Ping.  I think this patch is an improvement, but I didn't want the
> opportunity to remove more dead code pass by.  Any comments?
Acked-by: Stefan Reinauer <stepan@coresystems.de> for removing all the
->onboard stuff.

>
>      from src/drivers/pci/onboard.c:
>
>     static void onboard_enable(device_t dev)
>     {
>         struct drivers_pci_onboard_config *conf;
>             conf = dev->chip_info;
>         dev->rom_address = conf->rom_address;
>     }
>
>     Does it make sense to change ROM handling so that only "onboard"
>     devices can have their ROMs run?  That's the way it used to be, right?
>
No. Plugin cards (graphics cards) need to have their ROM run, too.

Stefan
Myles Watson - 2009-11-05 18:22:09
On Thu, Nov 5, 2009 at 12:12 PM, Stefan Reinauer <stepan@coresystems.de>wrote:

> Myles Watson wrote:
> >
> >
> > On Wed, Oct 28, 2009 at 2:18 PM, Myles Watson <mylesgw@gmail.com
> > <mailto:mylesgw@gmail.com>> wrote:
> >
> >
> >
> >     On Wed, Oct 28, 2009 at 1:58 PM, Uwe Hermann <uwe@hermann-uwe.de
> >     <mailto:uwe@hermann-uwe.de>> wrote:
> >
> >         See patch.
> >
> >     I think it would be nice to figure out what we do with the
> >     "onboard" device at the same time.
> >
> > Ping.  I think this patch is an improvement, but I didn't want the
> > opportunity to remove more dead code pass by.  Any comments?
> Acked-by: Stefan Reinauer <stepan@coresystems.de> for removing all the
> ->onboard stuff.
>
> >
> >      from src/drivers/pci/onboard.c:
> >
> >     static void onboard_enable(device_t dev)
> >     {
> >         struct drivers_pci_onboard_config *conf;
> >             conf = dev->chip_info;
> >         dev->rom_address = conf->rom_address;
> >     }
> >
> >     Does it make sense to change ROM handling so that only "onboard"
> >     devices can have their ROMs run?  That's the way it used to be,
> right?
> >
> No. Plugin cards (graphics cards) need to have their ROM run, too.
>
I meant should "onboard" devices be the only ones allowed to have ROMs in
CBFS, but I can see that that wasn't right either.  It just seems like when
we made the change to CBFS we allowed a lot more devices to have ROMs in
CBFS, and I was wondering if that was intentional, or a side-effect.

Thanks,
Myles
ron minnich - 2009-11-05 18:25:07
On Thu, Nov 5, 2009 at 10:22 AM, Myles Watson <mylesgw@gmail.com> wrote:

> I meant should "onboard" devices be the only ones allowed to have ROMs in
> CBFS, but I can see that that wasn't right either.  It just seems like when
> we made the change to CBFS we allowed a lot more devices to have ROMs in
> CBFS, and I was wondering if that was intentional, or a side-effect.

from my point of view, it fixed a problem that we also fixed in v3 --
it was really, really hard to have lots of ROM images in coreboot
before we went to LAR/CBFS. So we fixed a shortcoming.

It was incredibly painful (IMHO) to add rom images before we got CBFS.

What's interesting is we can even add (e.g.) an upgraded ROM image to
CBFS that might over-ride the ROM image on an add-in card. Hence you
can "upgrade" the rom image on a card without having to reflash the
card -- just put it in CBFS. We've never done this but the possibility
is there.

ron
Myles Watson - 2009-11-05 18:51:21
On Thu, Nov 5, 2009 at 12:25 PM, ron minnich <rminnich@gmail.com> wrote:

> On Thu, Nov 5, 2009 at 10:22 AM, Myles Watson <mylesgw@gmail.com> wrote:
>
> > I meant should "onboard" devices be the only ones allowed to have ROMs in
> > CBFS, but I can see that that wasn't right either.  It just seems like
> when
> > we made the change to CBFS we allowed a lot more devices to have ROMs in
> > CBFS, and I was wondering if that was intentional, or a side-effect.
>
> from my point of view, it fixed a problem that we also fixed in v3 --
> it was really, really hard to have lots of ROM images in coreboot
> before we went to LAR/CBFS. So we fixed a shortcoming.
>
> It was incredibly painful (IMHO) to add rom images before we got CBFS.
>
> What's interesting is we can even add (e.g.) an upgraded ROM image to
> CBFS that might over-ride the ROM image on an add-in card. Hence you
> can "upgrade" the rom image on a card without having to reflash the
> card -- just put it in CBFS. We've never done this but the possibility
> is there.
>

Great.  I just wanted to make sure we didn't need onboard any more.

Uwe:
Acked-by: Myles Watson <mylesgw@gmail.com>

Thanks,
Myles
Myles Watson - 2009-11-06 18:10:18
> Acked-by: Myles Watson <mylesgw@gmail.com>
>
Rev 4923.

Thanks,
Myles

Patch

Drop all pre-CBFS rom_address entries in Config.lb/devicetree.cb.

Since we have CBFS setting rom_address in board files is no longer 
necessary.

Also, drop vga_rom_address from RS690 completely, it was never used 
in the code.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>

Index: src/southbridge/amd/rs690/chip.h
===================================================================
--- src/southbridge/amd/rs690/chip.h	(Revision 4886)
+++ src/southbridge/amd/rs690/chip.h	(Arbeitskopie)
@@ -23,7 +23,6 @@ 
 /* Member variables are defined in Config.lb. */
 struct southbridge_amd_rs690_config
 {
-	u32 vga_rom_address;		/* The location that the VGA rom has been appened. */
 	u8 gpp_configuration;	/* The configuration of General Purpose Port, A/B/C/D/E. */
 	u8 port_enable;		/* Which port is enabled? GFX(2,3), GPP(4,5,6,7) */
 	u8 gfx_dev2_dev3;	/* for GFX Core initialization REFCLK_SEL */
Index: src/mainboard/iwill/dk8_htx/Config.lb
===================================================================
--- src/mainboard/iwill/dk8_htx/Config.lb	(Revision 4886)
+++ src/mainboard/iwill/dk8_htx/Config.lb	(Arbeitskopie)
@@ -234,7 +234,6 @@ 
 						device pci 1.0 off end
                                                 #chip drivers/pci/onboard
                                                 #        device pci 6.0 on end
-						#	register "rom_address" = "0xfff80000"
                                                 #end
 					end
 					device pci 1.0 on
Index: src/mainboard/iwill/dk8_htx/devicetree.cb
===================================================================
--- src/mainboard/iwill/dk8_htx/devicetree.cb	(Revision 4886)
+++ src/mainboard/iwill/dk8_htx/devicetree.cb	(Arbeitskopie)
@@ -26,7 +26,6 @@ 
 						device pci 1.0 off end
                                                 #chip drivers/pci/onboard
                                                 #        device pci 6.0 on end
-						#	register "rom_address" = "0xfff80000"
                                                 #end
 					end
 					device pci 1.0 on
Index: src/mainboard/broadcom/blast/Config.lb
===================================================================
--- src/mainboard/broadcom/blast/Config.lb	(Revision 4886)
+++ src/mainboard/broadcom/blast/Config.lb	(Arbeitskopie)
@@ -211,7 +211,6 @@ 
                                         chip drivers/pci/onboard
                                               device pci 4.0 on end # it is in bcm5785_0 bus, but the device id can not be changed even unitid is changed, fake one to get the rom_address
                                                                     # if CONFIG_HT_CHAIN_END_UNITID_BASE=0, it is 5, if CONFIG_HT_CHAIN_END_UNITID_BASE=1, it is 4
-                                              register "rom_address" = "0xfff80000"
                                         end
                                 end
                                         #when CONFIG_HT_CHAIN_END_UNITID_BASE > CONFIG_HT_CHAIN_UNITID_BASE (6, ,,,,)
@@ -220,7 +219,6 @@ 
 #                                        end
 #                                        chip drivers/pci/onboard
 #                                              device pci 5.0 on end # it is in bcm5785_0 bus, but the device id can not be changed even unitid is changed
-#                                              register "rom_address" = "0xfff80000"
 #                                        end
 
 
Index: src/mainboard/broadcom/blast/devicetree.cb
===================================================================
--- src/mainboard/broadcom/blast/devicetree.cb	(Revision 4886)
+++ src/mainboard/broadcom/blast/devicetree.cb	(Arbeitskopie)
@@ -109,7 +109,6 @@ 
                                         chip drivers/pci/onboard
                                               device pci 4.0 on end # it is in bcm5785_0 bus, but the device id can not be changed even unitid is changed, fake one to get the rom_address
                                                                     # if CONFIG_HT_CHAIN_END_UNITID_BASE=0, it is 5, if CONFIG_HT_CHAIN_END_UNITID_BASE=1, it is 4
-                                              register "rom_address" = "0xfff80000"
                                         end
                                 end
                                         #when CONFIG_HT_CHAIN_END_UNITID_BASE > CONFIG_HT_CHAIN_UNITID_BASE (6, ,,,,)
@@ -118,7 +117,6 @@ 
 #                                        end
 #                                        chip drivers/pci/onboard
 #                                              device pci 5.0 on end # it is in bcm5785_0 bus, but the device id can not be changed even unitid is changed
-#                                              register "rom_address" = "0xfff80000"
 #                                        end
 
 
Index: src/mainboard/thomson/ip1000/Config.lb
===================================================================
--- src/mainboard/thomson/ip1000/Config.lb	(Revision 4886)
+++ src/mainboard/thomson/ip1000/Config.lb	(Arbeitskopie)
@@ -77,7 +77,6 @@ 
     device pci 0.0 on end		# Host bridge
     chip drivers/pci/onboard		# Onboard VGA
       device pci 2.0 on end		# VGA (Intel 82830 CGC)
-      register "rom_address" = "0xfff00000"
     end
     chip southbridge/intel/i82801xx	# Southbridge
       register "pirqa_routing" = "0x05"
Index: src/mainboard/thomson/ip1000/devicetree.cb
===================================================================
--- src/mainboard/thomson/ip1000/devicetree.cb	(Revision 4886)
+++ src/mainboard/thomson/ip1000/devicetree.cb	(Arbeitskopie)
@@ -3,7 +3,6 @@ 
     device pci 0.0 on end		# Host bridge
     chip drivers/pci/onboard		# Onboard VGA
       device pci 2.0 on end		# VGA (Intel 82830 CGC)
-      register "rom_address" = "0xfff00000"
     end
     chip southbridge/intel/i82801xx	# Southbridge
       register "pirqa_routing" = "0x05"
Index: src/mainboard/supermicro/h8dmr/Config.lb
===================================================================
--- src/mainboard/supermicro/h8dmr/Config.lb	(Revision 4886)
+++ src/mainboard/supermicro/h8dmr/Config.lb	(Arbeitskopie)
@@ -278,8 +278,6 @@ 
                 			device pci 6.0 on  # PCI
                                                 chip drivers/pci/onboard
                                                         device pci 6.0 on end
-							register "rom_address" = "0xfff00000" #for 1M
-#                                                        register "rom_address" = "0xfff80000" #for 512K
                                                 end
 					end
         	        		device pci 6.1 on end # AZA
Index: src/mainboard/supermicro/h8dmr/devicetree.cb
===================================================================
--- src/mainboard/supermicro/h8dmr/devicetree.cb	(Revision 4886)
+++ src/mainboard/supermicro/h8dmr/devicetree.cb	(Arbeitskopie)
@@ -114,8 +114,6 @@ 
                 			device pci 6.0 on  # PCI
                                                 chip drivers/pci/onboard
                                                         device pci 6.0 on end
-							register "rom_address" = "0xfff00000" #for 1M
-#                                                        register "rom_address" = "0xfff80000" #for 512K
                                                 end
 					end
         	        		device pci 6.1 on end # AZA
Index: src/mainboard/supermicro/h8dme/Config.lb
===================================================================
--- src/mainboard/supermicro/h8dme/Config.lb	(Revision 4886)
+++ src/mainboard/supermicro/h8dme/Config.lb	(Arbeitskopie)
@@ -256,8 +256,6 @@ 
                 			device pci 6.0 on  # PCI
                                                 chip drivers/pci/onboard
                                                         device pci 6.0 on end
-							register "rom_address" = "0xfff00000" #for 1M
-#                                                        register "rom_address" = "0xfff80000" #for 512K
                                                 end
 					end
         	        		device pci 6.1 on end # AZA
Index: src/mainboard/supermicro/h8dme/devicetree.cb
===================================================================
--- src/mainboard/supermicro/h8dme/devicetree.cb	(Revision 4886)
+++ src/mainboard/supermicro/h8dme/devicetree.cb	(Arbeitskopie)
@@ -94,8 +94,6 @@ 
                 			device pci 6.0 on  # PCI
                                                 chip drivers/pci/onboard
                                                         device pci 6.0 on end
-							register "rom_address" = "0xfff00000" #for 1M
-#                                                        register "rom_address" = "0xfff80000" #for 512K
                                                 end
 					end
         	        		device pci 6.1 on end # AZA
Index: src/mainboard/supermicro/h8dmr_fam10/Config.lb
===================================================================
--- src/mainboard/supermicro/h8dmr_fam10/Config.lb	(Revision 4886)
+++ src/mainboard/supermicro/h8dmr_fam10/Config.lb	(Arbeitskopie)
@@ -282,8 +282,6 @@ 
                 			device pci 6.0 on  # PCI
                                                 chip drivers/pci/onboard
                                                         device pci 6.0 on end
-							register "rom_address" = "0xfff00000" #for 1M
-#                                                        register "rom_address" = "0xfff80000" #for 512K
                                                 end
 					end
         	        		device pci 6.1 on end # AZA
Index: src/mainboard/supermicro/h8dmr_fam10/devicetree.cb
===================================================================
--- src/mainboard/supermicro/h8dmr_fam10/devicetree.cb	(Revision 4886)
+++ src/mainboard/supermicro/h8dmr_fam10/devicetree.cb	(Arbeitskopie)
@@ -116,8 +116,6 @@ 
                 			device pci 6.0 on  # PCI
                                                 chip drivers/pci/onboard
                                                         device pci 6.0 on end
-							register "rom_address" = "0xfff00000" #for 1M
-#                                                        register "rom_address" = "0xfff80000" #for 512K
                                                 end
 					end
         	        		device pci 6.1 on end # AZA
Index: src/mainboard/kontron/986lcd-m/Config.lb
===================================================================
--- src/mainboard/kontron/986lcd-m/Config.lb	(Revision 4886)
+++ src/mainboard/kontron/986lcd-m/Config.lb	(Arbeitskopie)
@@ -155,9 +155,6 @@ 
 		# device pci 01.0 off end # i945 PCIe root port
 		chip drivers/pci/onboard
 			device pci 02.0 on end # vga controller
-			# register "rom_address" = "0xfffc0000"	# 256 KB image
-			# register "rom_address" = "0xfff80000"	# 512 KB image
-			register "rom_address" = "0xfff00000" # 1 MB image
 		end
 		device pci 02.1 on end # display controller
 
Index: src/mainboard/kontron/986lcd-m/devicetree.cb
===================================================================
--- src/mainboard/kontron/986lcd-m/devicetree.cb	(Revision 4886)
+++ src/mainboard/kontron/986lcd-m/devicetree.cb	(Arbeitskopie)
@@ -11,9 +11,6 @@ 
 		device pci 01.0 off end # i945 PCIe root port
 		chip drivers/pci/onboard
 			device pci 02.0 on end # vga controller
-			# register "rom_address" = "0xfffc0000"	# 256 KB image
-			# register "rom_address" = "0xfff80000"	# 512 KB image
-			register "rom_address" = "0xfff00000" # 1 MB image
 		end
 		device pci 02.1 on end # display controller
 
Index: src/mainboard/kontron/kt690/Config.lb
===================================================================
--- src/mainboard/kontron/kt690/Config.lb	(Revision 4886)
+++ src/mainboard/kontron/kt690/Config.lb	(Arbeitskopie)
@@ -134,7 +134,6 @@ 
 #The variables belong to mainboard are defined here.
 
 #Define gpp_configuration,	A=0, B=1, C=2, D=3, E=4(default)
-#Define vga_rom_address = 0xfff0000
 #Define port_enable, (bit map): GFX(2,3), GPP(4,5,6,7)
 #Define gfx_dev2_dev3, 0: a link will never be established on Dev2 or Dev3,
 #					   1: the system allows a PCIE link to be established on Dev2 or Dev3.
@@ -158,7 +157,6 @@ 
 					device pci 1.0 on  # Internal Graphics P2P bridge 0x7912
 						chip drivers/pci/onboard
 							device pci 5.0 on end	# Internal Graphics 0x791F
-							register "rom_address" = "0xfff00000"
 						end
 					end
 					device pci 2.0 on end # PCIE P2P bridge (external graphics) 0x7913
@@ -168,7 +166,6 @@ 
 					device pci 6.0 on end # PCIE P2P bridge 0x7916
 					device pci 7.0 on end # PCIE P2P bridge 0x7917
 					device pci 8.0 off end # NB/SB Link P2P bridge
-					register "vga_rom_address" = "0xfff00000"
 					register "gpp_configuration" = "4"
 					register "port_enable" = "0xfc"
 					register "gfx_dev2_dev3" = "1"
Index: src/mainboard/kontron/kt690/devicetree.cb
===================================================================
--- src/mainboard/kontron/kt690/devicetree.cb	(Revision 4886)
+++ src/mainboard/kontron/kt690/devicetree.cb	(Arbeitskopie)
@@ -1,5 +1,4 @@ 
 #Define gpp_configuration,	A=0, B=1, C=2, D=3, E=4(default)
-#Define vga_rom_address = 0xfff0000
 #Define port_enable, (bit map): GFX(2,3), GPP(4,5,6,7)
 #Define gfx_dev2_dev3, 0: a link will never be established on Dev2 or Dev3,
 #					   1: the system allows a PCIE link to be established on Dev2 or Dev3.
@@ -23,7 +22,6 @@ 
 					device pci 1.0 on  # Internal Graphics P2P bridge 0x7912
 						chip drivers/pci/onboard
 							device pci 5.0 on end	# Internal Graphics 0x791F
-							register "rom_address" = "0xfff00000"
 						end
 					end
 					device pci 2.0 on end # PCIE P2P bridge (external graphics) 0x7913
@@ -33,7 +31,6 @@ 
 					device pci 6.0 on end # PCIE P2P bridge 0x7916
 					device pci 7.0 on end # PCIE P2P bridge 0x7917
 					device pci 8.0 off end # NB/SB Link P2P bridge
-					register "vga_rom_address" = "0xfff00000"
 					register "gpp_configuration" = "4"
 					register "port_enable" = "0xfc"
 					register "gfx_dev2_dev3" = "1"
Index: src/mainboard/gigabyte/ga_2761gxdk/Config.lb
===================================================================
--- src/mainboard/gigabyte/ga_2761gxdk/Config.lb	(Revision 4886)
+++ src/mainboard/gigabyte/ga_2761gxdk/Config.lb	(Arbeitskopie)
@@ -180,7 +180,6 @@ 
 					device pci 1.0 on		# AGP bridge
 					  chip drivers/pci/onboard	# Integrated VGA
 						device pci 0.0 on end
-						register "rom_address" = "0xfff80000"
 					  end
 					end
                 			device pci 2.0 on # LPC
Index: src/mainboard/gigabyte/ga_2761gxdk/devicetree.cb
===================================================================
--- src/mainboard/gigabyte/ga_2761gxdk/devicetree.cb	(Revision 4886)
+++ src/mainboard/gigabyte/ga_2761gxdk/devicetree.cb	(Arbeitskopie)
@@ -13,7 +13,6 @@ 
 					device pci 1.0 on		# AGP bridge
 					  chip drivers/pci/onboard	# Integrated VGA
 						device pci 0.0 on end
-						register "rom_address" = "0xfff80000"
 					  end
 					end
                 			device pci 2.0 on # LPC
Index: src/mainboard/digitallogic/msm586seg/Config.lb
===================================================================
--- src/mainboard/digitallogic/msm586seg/Config.lb	(Revision 4886)
+++ src/mainboard/digitallogic/msm586seg/Config.lb	(Arbeitskopie)
@@ -108,7 +108,6 @@ 
 		end
 		chip drivers/pci/onboard
 			device pci 14.0 on end # 69000
-			register "rom_address" = "0x2000000"
 		end
 #		register "com1" = "{1}"
 #		register "com1" = "{1, 0, 0x3f8, 4}"
Index: src/mainboard/digitallogic/msm586seg/devicetree.cb
===================================================================
--- src/mainboard/digitallogic/msm586seg/devicetree.cb	(Revision 4886)
+++ src/mainboard/digitallogic/msm586seg/devicetree.cb	(Arbeitskopie)
@@ -7,7 +7,6 @@ 
 		end
 		chip drivers/pci/onboard
 			device pci 14.0 on end # 69000
-			register "rom_address" = "0x2000000"
 		end
 #		register "com1" = "{1}"
 #		register "com1" = "{1, 0, 0x3f8, 4}"
Index: src/mainboard/mitac/6513wu/Config.lb
===================================================================
--- src/mainboard/mitac/6513wu/Config.lb	(Revision 4886)
+++ src/mainboard/mitac/6513wu/Config.lb	(Arbeitskopie)
@@ -82,7 +82,6 @@ 
     device pci 0.0 on end               # Graphics Memory Controller Hub (GMCH)
     chip drivers/pci/onboard
       device pci 1.0 on end
-      register "rom_address" = "0xfff80000" # 512 KB image
     end
     chip southbridge/intel/i82801xx     # Southbridge
       register "pirqa_routing" = "0x03"
Index: src/mainboard/mitac/6513wu/devicetree.cb
===================================================================
--- src/mainboard/mitac/6513wu/devicetree.cb	(Revision 4886)
+++ src/mainboard/mitac/6513wu/devicetree.cb	(Arbeitskopie)
@@ -28,7 +28,6 @@ 
     device pci 0.0 on end               # Graphics Memory Controller Hub (GMCH)
     chip drivers/pci/onboard
       device pci 1.0 on end
-      register "rom_address" = "0xfff80000" # 512 KB image
     end
     chip southbridge/intel/i82801xx     # Southbridge
       register "pirqa_routing" = "0x03"
Index: src/mainboard/technologic/ts5300/Config.lb
===================================================================
--- src/mainboard/technologic/ts5300/Config.lb	(Revision 4886)
+++ src/mainboard/technologic/ts5300/Config.lb	(Arbeitskopie)
@@ -109,7 +109,6 @@ 
 #		end
 #		chip drivers/pci/onboard
 #			device pci 14.0 on end # 69000
-#			register "rom_address" = "0x2000000"
 #		end
 #		register "com1" = "{1}"
 #		register "com1" = "{1, 0, 0x3f8, 4}"
Index: src/mainboard/technologic/ts5300/devicetree.cb
===================================================================
--- src/mainboard/technologic/ts5300/devicetree.cb	(Revision 4886)
+++ src/mainboard/technologic/ts5300/devicetree.cb	(Arbeitskopie)
@@ -7,7 +7,6 @@ 
 #		end
 #		chip drivers/pci/onboard
 #			device pci 14.0 on end # 69000
-#			register "rom_address" = "0x2000000"
 #		end
 #		register "com1" = "{1}"
 #		register "com1" = "{1, 0, 0x3f8, 4}"
Index: src/mainboard/amd/pistachio/Config.lb
===================================================================
--- src/mainboard/amd/pistachio/Config.lb	(Revision 4886)
+++ src/mainboard/amd/pistachio/Config.lb	(Arbeitskopie)
@@ -158,7 +158,6 @@ 
 					device pci 1.0 on  # Internal Graphics P2P bridge 0x7912
 						chip drivers/pci/onboard
 							device pci 5.0 on end	# Internal Graphics 0x791F
-							register "rom_address" = "0xfff00000"
 						end
 					end
 					device pci 2.0 on end # PCIE P2P bridge (external graphics) 0x7913
Index: src/mainboard/amd/pistachio/devicetree.cb
===================================================================
--- src/mainboard/amd/pistachio/devicetree.cb	(Revision 4886)
+++ src/mainboard/amd/pistachio/devicetree.cb	(Arbeitskopie)
@@ -23,7 +23,6 @@ 
 					device pci 1.0 on  # Internal Graphics P2P bridge 0x7912
 						chip drivers/pci/onboard
 							device pci 5.0 on end	# Internal Graphics 0x791F
-							register "rom_address" = "0xfff00000"
 						end
 					end
 					device pci 2.0 on end # PCIE P2P bridge (external graphics) 0x7913
Index: src/mainboard/amd/dbm690t/Config.lb
===================================================================
--- src/mainboard/amd/dbm690t/Config.lb	(Revision 4886)
+++ src/mainboard/amd/dbm690t/Config.lb	(Arbeitskopie)
@@ -157,7 +157,6 @@ 
 					device pci 1.0 on  # Internal Graphics P2P bridge 0x7912
 						chip drivers/pci/onboard
 							device pci 5.0 on end	# Internal Graphics 0x791F
-							register "rom_address" = "0xfff00000"
 						end
 					end
 					device pci 2.0 on end # PCIE P2P bridge (external graphics) 0x7913
Index: src/mainboard/amd/dbm690t/devicetree.cb
===================================================================
--- src/mainboard/amd/dbm690t/devicetree.cb	(Revision 4886)
+++ src/mainboard/amd/dbm690t/devicetree.cb	(Arbeitskopie)
@@ -22,7 +22,6 @@ 
 					device pci 1.0 on  # Internal Graphics P2P bridge 0x7912
 						chip drivers/pci/onboard
 							device pci 5.0 on end	# Internal Graphics 0x791F
-							register "rom_address" = "0xfff00000"
 						end
 					end
 					device pci 2.0 on end # PCIE P2P bridge (external graphics) 0x7913
Index: src/mainboard/nec/powermate2000/Config.lb
===================================================================
--- src/mainboard/nec/powermate2000/Config.lb	(Revision 4886)
+++ src/mainboard/nec/powermate2000/Config.lb	(Arbeitskopie)
@@ -78,7 +78,6 @@ 
     device pci 1.0 off				# Onboard video
       # chip drivers/pci/onboard
       #   device pci 1.0 on end
-      #   register "rom_address" = "0xfff80000"
       # end
     end
     chip southbridge/intel/i82801xx		# Southbridge
Index: src/mainboard/nec/powermate2000/devicetree.cb
===================================================================
--- src/mainboard/nec/powermate2000/devicetree.cb	(Revision 4886)
+++ src/mainboard/nec/powermate2000/devicetree.cb	(Arbeitskopie)
@@ -9,7 +9,6 @@ 
     device pci 1.0 off				# Onboard video
       # chip drivers/pci/onboard
       #   device pci 1.0 on end
-      #   register "rom_address" = "0xfff80000"
       # end
     end
     chip southbridge/intel/i82801xx		# Southbridge
Index: src/mainboard/rca/rm4100/Config.lb
===================================================================
--- src/mainboard/rca/rm4100/Config.lb	(Revision 4886)
+++ src/mainboard/rca/rm4100/Config.lb	(Arbeitskopie)
@@ -77,7 +77,6 @@ 
     device pci 0.0 on end		# Host bridge
     chip drivers/pci/onboard		# Onboard VGA
       device pci 2.0 on end		# VGA (Intel 82830 CGC)
-      register "rom_address" = "0xfff00000"
     end
     chip southbridge/intel/i82801xx	# Southbridge
       register "pirqa_routing" = "0x05"
Index: src/mainboard/rca/rm4100/devicetree.cb
===================================================================
--- src/mainboard/rca/rm4100/devicetree.cb	(Revision 4886)
+++ src/mainboard/rca/rm4100/devicetree.cb	(Arbeitskopie)
@@ -3,7 +3,6 @@ 
     device pci 0.0 on end		# Host bridge
     chip drivers/pci/onboard		# Onboard VGA
       device pci 2.0 on end		# VGA (Intel 82830 CGC)
-      register "rom_address" = "0xfff00000"
     end
     chip southbridge/intel/i82801xx	# Southbridge
       register "pirqa_routing" = "0x05"
Index: src/mainboard/hp/e_vectra_p2706t/Config.lb
===================================================================
--- src/mainboard/hp/e_vectra_p2706t/Config.lb	(Revision 4886)
+++ src/mainboard/hp/e_vectra_p2706t/Config.lb	(Arbeitskopie)
@@ -78,7 +78,6 @@ 
     device pci 0.0 on end			# Host bridge
     chip drivers/pci/onboard			# Onboard VGA
       device pci 1.0 on end
-      register "rom_address" = "0xfff80000"	# 512 KB image
     end
     chip southbridge/intel/i82801xx		# Southbridge
       register "ide0_enable" = "1"
Index: src/mainboard/hp/e_vectra_p2706t/devicetree.cb
===================================================================
--- src/mainboard/hp/e_vectra_p2706t/devicetree.cb	(Revision 4886)
+++ src/mainboard/hp/e_vectra_p2706t/devicetree.cb	(Arbeitskopie)
@@ -9,7 +9,6 @@ 
     device pci 0.0 on end			# Host bridge
     chip drivers/pci/onboard			# Onboard VGA
       device pci 1.0 on end
-      register "rom_address" = "0xfff80000"	# 512 KB image
     end
     chip southbridge/intel/i82801xx		# Southbridge
       register "ide0_enable" = "1"
Index: src/mainboard/tyan/s2850/Config.lb
===================================================================
--- src/mainboard/tyan/s2850/Config.lb	(Revision 4886)
+++ src/mainboard/tyan/s2850/Config.lb	(Arbeitskopie)
@@ -121,7 +121,6 @@ 
                                                 #chip drivers/ati/ragexl
 						chip drivers/pci/onboard
                                                         device pci b.0 on end
-							register "rom_address" = "0xfff80000"
                                                 end
 					end
 					device pci 1.0 on
Index: src/mainboard/tyan/s2850/devicetree.cb
===================================================================
--- src/mainboard/tyan/s2850/devicetree.cb	(Revision 4886)
+++ src/mainboard/tyan/s2850/devicetree.cb	(Arbeitskopie)
@@ -19,7 +19,6 @@ 
                                                 #chip drivers/ati/ragexl
 						chip drivers/pci/onboard
                                                         device pci b.0 on end
-							register "rom_address" = "0xfff80000"
                                                 end
 					end
 					device pci 1.0 on
Index: src/mainboard/tyan/s2880/Config.lb
===================================================================
--- src/mainboard/tyan/s2880/Config.lb	(Revision 4886)
+++ src/mainboard/tyan/s2880/Config.lb	(Arbeitskopie)
@@ -140,7 +140,6 @@ 
                                                 end
                                                 chip drivers/pci/onboard
                                                         device pci 6.0 on end #adti
-                                                        register "rom_address" = "0xfff80000"
                                                 end
 					end
 					device pci 1.0 on
Index: src/mainboard/tyan/s2880/devicetree.cb
===================================================================
--- src/mainboard/tyan/s2880/devicetree.cb	(Revision 4886)
+++ src/mainboard/tyan/s2880/devicetree.cb	(Arbeitskopie)
@@ -38,7 +38,6 @@ 
                                                 end
                                                 chip drivers/pci/onboard
                                                         device pci 6.0 on end #adti
-                                                        register "rom_address" = "0xfff80000"
                                                 end
 					end
 					device pci 1.0 on
Index: src/mainboard/tyan/s2881/Config.lb
===================================================================
--- src/mainboard/tyan/s2881/Config.lb	(Revision 4886)
+++ src/mainboard/tyan/s2881/Config.lb	(Arbeitskopie)
@@ -141,7 +141,6 @@ 
                                                 end
                                                 chip drivers/pci/onboard
                                                         device pci 6.0 on end
-							register "rom_address" = "0xfff80000"
                                                 end
 					end
 					device pci 1.0 on
Index: src/mainboard/tyan/s2881/devicetree.cb
===================================================================
--- src/mainboard/tyan/s2881/devicetree.cb	(Revision 4886)
+++ src/mainboard/tyan/s2881/devicetree.cb	(Arbeitskopie)
@@ -39,7 +39,6 @@ 
                                                 end
                                                 chip drivers/pci/onboard
                                                         device pci 6.0 on end
-							register "rom_address" = "0xfff80000"
                                                 end
 					end
 					device pci 1.0 on
Index: src/mainboard/tyan/s4880/Config.lb
===================================================================
--- src/mainboard/tyan/s4880/Config.lb	(Revision 4886)
+++ src/mainboard/tyan/s4880/Config.lb	(Arbeitskopie)
@@ -135,7 +135,6 @@ 
 						device pci 1.0 off end
                                                 chip drivers/pci/onboard
                                                         device pci 6.0 on end
-                                                        register "rom_address" = "0xfff80000"
                                                 end
 					end
 					device pci 1.0 on
Index: src/mainboard/tyan/s4880/devicetree.cb
===================================================================
--- src/mainboard/tyan/s4880/devicetree.cb	(Revision 4886)
+++ src/mainboard/tyan/s4880/devicetree.cb	(Arbeitskopie)
@@ -38,7 +38,6 @@ 
 						device pci 1.0 off end
                                                 chip drivers/pci/onboard
                                                         device pci 6.0 on end
-                                                        register "rom_address" = "0xfff80000"
                                                 end
 					end
 					device pci 1.0 on
Index: src/mainboard/tyan/s2882/Config.lb
===================================================================
--- src/mainboard/tyan/s2882/Config.lb	(Revision 4886)
+++ src/mainboard/tyan/s2882/Config.lb	(Arbeitskopie)
@@ -141,7 +141,6 @@ 
                                         #       chip drivers/ati/ragexl
                                                 chip drivers/pci/onboard
                                                         device pci 6.0 on end
-                                                        register "rom_address" = "0xfff00000"
                                                 end
                                                 chip drivers/pci/onboard 
                                                         device pci 8.0 on end #intel 10/100
Index: src/mainboard/tyan/s2882/devicetree.cb
===================================================================
--- src/mainboard/tyan/s2882/devicetree.cb	(Revision 4886)
+++ src/mainboard/tyan/s2882/devicetree.cb	(Arbeitskopie)
@@ -39,7 +39,6 @@ 
                                         #       chip drivers/ati/ragexl
                                                 chip drivers/pci/onboard
                                                         device pci 6.0 on end
-                                                        register "rom_address" = "0xfff00000"
                                                 end
                                                 chip drivers/pci/onboard 
                                                         device pci 8.0 on end #intel 10/100
Index: src/mainboard/tyan/s2875/Config.lb
===================================================================
--- src/mainboard/tyan/s2875/Config.lb	(Revision 4886)
+++ src/mainboard/tyan/s2875/Config.lb	(Arbeitskopie)
@@ -125,7 +125,6 @@ 
 						device pci 1.0 off end
                                                 chip drivers/pci/onboard
                                                         device pci 5.0 on end
-                                                        register "rom_address" = "0xfff80000"
                                                 end
 					end
 					device pci 1.0 on
Index: src/mainboard/tyan/s2875/devicetree.cb
===================================================================
--- src/mainboard/tyan/s2875/devicetree.cb	(Revision 4886)
+++ src/mainboard/tyan/s2875/devicetree.cb	(Arbeitskopie)
@@ -23,7 +23,6 @@ 
 						device pci 1.0 off end
                                                 chip drivers/pci/onboard
                                                         device pci 5.0 on end
-                                                        register "rom_address" = "0xfff80000"
                                                 end
 					end
 					device pci 1.0 on
Index: src/mainboard/tyan/s4882/Config.lb
===================================================================
--- src/mainboard/tyan/s4882/Config.lb	(Revision 4886)
+++ src/mainboard/tyan/s4882/Config.lb	(Arbeitskopie)
@@ -134,7 +134,6 @@ 
                                                 #chip drivers/ati/ragexl
                                                 chip drivers/pci/onboard
                                                         device pci 6.0 on end
-                                                        register "rom_address" = "0xfff80000"
                                                 end
                                                 chip drivers/pci/onboard
                                                         device pci 5.0 on end #SiI
Index: src/mainboard/tyan/s4882/devicetree.cb
===================================================================
--- src/mainboard/tyan/s4882/devicetree.cb	(Revision 4886)
+++ src/mainboard/tyan/s4882/devicetree.cb	(Arbeitskopie)
@@ -37,7 +37,6 @@ 
                                                 #chip drivers/ati/ragexl
                                                 chip drivers/pci/onboard
                                                         device pci 6.0 on end
-                                                        register "rom_address" = "0xfff80000"
                                                 end
                                                 chip drivers/pci/onboard
                                                         device pci 5.0 on end #SiI
Index: src/mainboard/tyan/s2912_fam10/Config.lb
===================================================================
--- src/mainboard/tyan/s2912_fam10/Config.lb	(Revision 4886)
+++ src/mainboard/tyan/s2912_fam10/Config.lb	(Arbeitskopie)
@@ -281,7 +281,6 @@ 
 					device pci 6.0 on
 						chip drivers/pci/onboard
 							device pci 4.0 on end
-							register "rom_address" = "0xfff00000"
 						end
 					end # PCI
 					device pci 6.1 off end # AZA
Index: src/mainboard/tyan/s2912_fam10/devicetree.cb
===================================================================
--- src/mainboard/tyan/s2912_fam10/devicetree.cb	(Revision 4886)
+++ src/mainboard/tyan/s2912_fam10/devicetree.cb	(Arbeitskopie)
@@ -114,7 +114,6 @@ 
 					device pci 6.0 on
 						chip drivers/pci/onboard
 							device pci 4.0 on end
-							register "rom_address" = "0xfff00000"
 						end
 					end # PCI
 					device pci 6.1 off end # AZA
Index: src/mainboard/asi/mb_5blmp/Config.lb
===================================================================
--- src/mainboard/asi/mb_5blmp/Config.lb	(Revision 4886)
+++ src/mainboard/asi/mb_5blmp/Config.lb	(Arbeitskopie)
@@ -138,9 +138,6 @@ 
       # device pci 12.4 on		# VGA (onboard)
       #   chip drivers/pci/onboard
       #     device pci 12.4 on end
-      #     register "rom_address" = "0xfffc0000" # 256 KB image
-      #     # register "rom_address" = "0xfff80000" # 512 KB image
-      #     # register "rom_address" = "0xfff00000" # 1 MB image
       #   end
       # end
       device pci 13.0 on end		# USB
Index: src/mainboard/asi/mb_5blmp/devicetree.cb
===================================================================
--- src/mainboard/asi/mb_5blmp/devicetree.cb	(Revision 4886)
+++ src/mainboard/asi/mb_5blmp/devicetree.cb	(Arbeitskopie)
@@ -40,9 +40,6 @@ 
       # device pci 12.4 on		# VGA (onboard)
       #   chip drivers/pci/onboard
       #     device pci 12.4 on end
-      #     register "rom_address" = "0xfffc0000" # 256 KB image
-      #     # register "rom_address" = "0xfff80000" # 512 KB image
-      #     # register "rom_address" = "0xfff00000" # 1 MB image
       #   end
       # end
       device pci 13.0 on end		# USB
Index: src/mainboard/via/vt8454c/Config.lb
===================================================================
--- src/mainboard/via/vt8454c/Config.lb	(Revision 4886)
+++ src/mainboard/via/vt8454c/Config.lb	(Arbeitskopie)
@@ -123,9 +123,6 @@ 
 		device pci 1.0 on     # PCI Bridge
 			chip drivers/pci/onboard
 				device pci 0.0 on end
-				#register "rom_address" = "0xfffc0000" #256k image
-				register "rom_address" = "0xfff80000" #512k image
-				#register "rom_address" = "0xfff00000" #1024k image
 			end # Onboard Video
 		end # PCI Bridge
 		device pci f.0 on end # IDE/SATA
Index: src/mainboard/via/vt8454c/devicetree.cb
===================================================================
--- src/mainboard/via/vt8454c/devicetree.cb	(Revision 4886)
+++ src/mainboard/via/vt8454c/devicetree.cb	(Arbeitskopie)
@@ -14,9 +14,6 @@ 
 		device pci 1.0 on     # PCI Bridge
 			chip drivers/pci/onboard
 				device pci 0.0 on end
-				#register "rom_address" = "0xfffc0000" #256k image
-				register "rom_address" = "0xfff80000" #512k image
-				#register "rom_address" = "0xfff00000" #1024k image
 			end # Onboard Video
 		end # PCI Bridge
 		device pci f.0 on end # IDE/SATA
Index: src/mainboard/msi/ms9282/Config.lb
===================================================================
--- src/mainboard/msi/ms9282/Config.lb	(Revision 4886)
+++ src/mainboard/msi/ms9282/Config.lb	(Arbeitskopie)
@@ -280,7 +280,6 @@ 
                                        device pci 6.0 on  #P2P
                                                chip drivers/pci/onboard
                                                        device pci 4.0 on end
-                                                       register "rom_address" = "0xfff80000"
                                                end
                                        end # P2P
                                        device pci 7.0 on end # reserve
Index: src/mainboard/msi/ms9282/devicetree.cb
===================================================================
--- src/mainboard/msi/ms9282/devicetree.cb	(Revision 4886)
+++ src/mainboard/msi/ms9282/devicetree.cb	(Arbeitskopie)
@@ -139,7 +139,6 @@ 
                                        device pci 6.0 on  #P2P
                                                chip drivers/pci/onboard
                                                        device pci 4.0 on end
-                                                       register "rom_address" = "0xfff80000"
                                                end
                                        end # P2P
                                        device pci 7.0 on end # reserve
Index: src/mainboard/msi/ms6178/Config.lb
===================================================================
--- src/mainboard/msi/ms6178/Config.lb	(Revision 4886)
+++ src/mainboard/msi/ms6178/Config.lb	(Arbeitskopie)
@@ -77,7 +77,6 @@ 
     device pci 0.0 on end			# Host bridge
     chip drivers/pci/onboard			# Onboard VGA
       device pci 1.0 on end
-      register "rom_address" = "0xfff80000"	# 512 KB image
     end
     chip southbridge/intel/i82801xx		# Southbridge
       register "ide0_enable" = "1"
Index: src/mainboard/msi/ms6178/devicetree.cb
===================================================================
--- src/mainboard/msi/ms6178/devicetree.cb	(Revision 4886)
+++ src/mainboard/msi/ms6178/devicetree.cb	(Arbeitskopie)
@@ -28,7 +28,6 @@ 
     device pci 0.0 on end			# Host bridge
     chip drivers/pci/onboard			# Onboard VGA
       device pci 1.0 on end
-      register "rom_address" = "0xfff80000"	# 512 KB image
     end
     chip southbridge/intel/i82801xx		# Southbridge
       register "ide0_enable" = "1"
Index: src/mainboard/msi/ms9185/Config.lb
===================================================================
--- src/mainboard/msi/ms9185/Config.lb	(Revision 4886)
+++ src/mainboard/msi/ms9185/Config.lb	(Arbeitskopie)
@@ -211,7 +211,6 @@ 
                                         chip drivers/pci/onboard
                                               device pci 3.0 on end # it is in bcm5785_0 bus, but the device id can not be changed even unitid is changed, fake one to get the rom_address
                                                                     # if CONFIG_HT_CHAIN_END_UNITID_BASE=0, it is 4, if CONFIG_HT_CHAIN_END_UNITID_BASE=1, it is 3
-                                              register "rom_address" = "0xfff80000"
                                         end
                                        #bx_a013+ start
                                        #chip drivers/pci/onboard    #SATA2
@@ -229,7 +228,6 @@ 
 #                                        end
 #                                        chip drivers/pci/onboard
 #                                              device pci 4.0 on end # it is in bcm5785_0 bus, but the device id can not be changed even unitid is changed
-#                                              register "rom_address" = "0xfff80000"
 #                                        end
 
                        end #  device pci 18.0
Index: src/mainboard/msi/ms9185/devicetree.cb
===================================================================
--- src/mainboard/msi/ms9185/devicetree.cb	(Revision 4886)
+++ src/mainboard/msi/ms9185/devicetree.cb	(Arbeitskopie)
@@ -77,7 +77,6 @@ 
                                         chip drivers/pci/onboard
                                               device pci 3.0 on end # it is in bcm5785_0 bus, but the device id can not be changed even unitid is changed, fake one to get the rom_address
                                                                     # if CONFIG_HT_CHAIN_END_UNITID_BASE=0, it is 4, if CONFIG_HT_CHAIN_END_UNITID_BASE=1, it is 3
-                                              register "rom_address" = "0xfff80000"
                                         end
                                        #bx_a013+ start
                                        #chip drivers/pci/onboard    #SATA2
@@ -95,7 +94,6 @@ 
 #                                        end
 #                                        chip drivers/pci/onboard
 #                                              device pci 4.0 on end # it is in bcm5785_0 bus, but the device id can not be changed even unitid is changed
-#                                              register "rom_address" = "0xfff80000"
 #                                        end
 
                        end #  device pci 18.0
Index: src/mainboard/arima/hdama/Config.lb
===================================================================
--- src/mainboard/arima/hdama/Config.lb	(Revision 4886)
+++ src/mainboard/arima/hdama/Config.lb	(Arbeitskopie)
@@ -179,7 +179,6 @@ 
 						device pci 1.0 off end	# LAN
 						chip drivers/pci/onboard
 							device pci 6.0 on end # ATI Rage XL
-							register "rom_address" = "0xfff80000"
 						end
 						## PCI Slot 5 (correct?)
 						#chip drivers/generic/generic
Index: src/mainboard/arima/hdama/devicetree.cb
===================================================================
--- src/mainboard/arima/hdama/devicetree.cb	(Revision 4886)
+++ src/mainboard/arima/hdama/devicetree.cb	(Arbeitskopie)
@@ -75,7 +75,6 @@ 
 						device pci 1.0 off end	# LAN
 						chip drivers/pci/onboard
 							device pci 6.0 on end # ATI Rage XL
-							register "rom_address" = "0xfff80000"
 						end
 						## PCI Slot 5 (correct?)
 						#chip drivers/generic/generic
Index: src/mainboard/technexion/tim8690/Config.lb
===================================================================
--- src/mainboard/technexion/tim8690/Config.lb	(Revision 4886)
+++ src/mainboard/technexion/tim8690/Config.lb	(Arbeitskopie)
@@ -134,7 +134,6 @@ 
 #The variables belong to mainboard are defined here.
 
 #Define gpp_configuration,	A=0, B=1, C=2, D=3, E=4(default)
-#Define vga_rom_address = 0xfff80000
 #Define port_enable, (bit map): GFX(2,3), GPP(4,5,6,7)
 #Define gfx_dev2_dev3, 0: a link will never be established on Dev2 or Dev3,
 #					   1: the system allows a PCIE link to be established on Dev2 or Dev3.
@@ -158,7 +157,6 @@ 
 					device pci 1.0 on  # Internal Graphics P2P bridge 0x7912
 						chip drivers/pci/onboard
 							device pci 5.0 on end	# Internal Graphics 0x791F
-							register "rom_address" = "0xfff80000"
 						end
 					end
 					device pci 2.0 on end # PCIE P2P bridge (external graphics) 0x7913
@@ -168,7 +166,6 @@ 
 					device pci 6.0 on end # PCIE P2P bridge 0x7916
 					device pci 7.0 on end # PCIE P2P bridge 0x7917
 					device pci 8.0 off end # NB/SB Link P2P bridge
-					register "vga_rom_address" = "0xfff80000"
 					register "gpp_configuration" = "4"
 					register "port_enable" = "0xfc"
 					register "gfx_dev2_dev3" = "1"
Index: src/mainboard/technexion/tim8690/devicetree.cb
===================================================================
--- src/mainboard/technexion/tim8690/devicetree.cb	(Revision 4886)
+++ src/mainboard/technexion/tim8690/devicetree.cb	(Arbeitskopie)
@@ -1,5 +1,4 @@ 
 #Define gpp_configuration,	A=0, B=1, C=2, D=3, E=4(default)
-#Define vga_rom_address = 0xfff80000
 #Define port_enable, (bit map): GFX(2,3), GPP(4,5,6,7)
 #Define gfx_dev2_dev3, 0: a link will never be established on Dev2 or Dev3,
 #			1: the system allows a PCIE link to be established on Dev2 or Dev3.
@@ -23,7 +22,6 @@ 
 					device pci 1.0 on  # Internal Graphics P2P bridge 0x7912
 						chip drivers/pci/onboard
 							device pci 5.0 on end	# Internal Graphics 0x791F
-							register "rom_address" = "0xfff80000"
 						end
 					end
 					device pci 2.0 on end # PCIE P2P bridge (external graphics) 0x7913
@@ -33,7 +31,6 @@ 
 					device pci 6.0 on end # PCIE P2P bridge 0x7916
 					device pci 7.0 on end # PCIE P2P bridge 0x7917
 					device pci 8.0 off end # NB/SB Link P2P bridge
-					register "vga_rom_address" = "0xfff80000"
 					register "gpp_configuration" = "4"
 					register "port_enable" = "0xfc"
 					register "gfx_dev2_dev3" = "1"
Index: src/mainboard/technexion/tim5690/Config.lb
===================================================================
--- src/mainboard/technexion/tim5690/Config.lb	(Revision 4886)
+++ src/mainboard/technexion/tim5690/Config.lb	(Arbeitskopie)
@@ -134,7 +134,6 @@ 
 #The variables belong to mainboard are defined here.
 
 #Define gpp_configuration,	A=0, B=1, C=2, D=3, E=4(default)
-#Define vga_rom_address = 0xfff80000
 #Define port_enable, (bit map): GFX(2,3), GPP(4,5,6,7)
 #Define gfx_dev2_dev3, 0: a link will never be established on Dev2 or Dev3,
 #			1: the system allows a PCIE link to be established on Dev2 or Dev3.
@@ -158,10 +157,6 @@ 
 					device pci 1.0 on  # Internal Graphics P2P bridge 0x7912
 						chip drivers/pci/onboard
 							device pci 5.0 on end	# Internal Graphics 0x791F
-							register "rom_address" = "0xfff80000" #512KB
-							#register "rom_address" = "0xfff00000" #1024KB
-							#register "rom_address" = "0xffe00000" #2048KB
-							#register "rom_address" = "0xffc00000" #4096KB
 						end
 					end
 					device pci 2.0 on end # PCIE P2P bridge (external graphics) 0x7913
@@ -171,10 +166,6 @@ 
 					device pci 6.0 on end # PCIE P2P bridge 0x7916
 					device pci 7.0 on end # PCIE P2P bridge 0x7917
 					device pci 8.0 off end # NB/SB Link P2P bridge
-					register "vga_rom_address" = "0xfff80000"
-					#register "vga_rom_address" = "0xfff00000"
-					#register "vga_rom_address" = "0xffe00000"
-					#register "vga_rom_address" = "0xffc00000"
 					register "gpp_configuration" = "4"
 					register "port_enable" = "0xfc"
 					register "gfx_dev2_dev3" = "1"
Index: src/mainboard/technexion/tim5690/devicetree.cb
===================================================================
--- src/mainboard/technexion/tim5690/devicetree.cb	(Revision 4886)
+++ src/mainboard/technexion/tim5690/devicetree.cb	(Arbeitskopie)
@@ -1,5 +1,4 @@ 
 #Define gpp_configuration,	A=0, B=1, C=2, D=3, E=4(default)
-#Define vga_rom_address = 0xfff80000
 #Define port_enable, (bit map): GFX(2,3), GPP(4,5,6,7)
 #Define gfx_dev2_dev3, 0: a link will never be established on Dev2 or Dev3,
 #			1: the system allows a PCIE link to be established on Dev2 or Dev3.
@@ -23,10 +22,6 @@ 
 					device pci 1.0 on  # Internal Graphics P2P bridge 0x7912
 						chip drivers/pci/onboard
 							device pci 5.0 on end	# Internal Graphics 0x791F
-							register "rom_address" = "0xfff80000" #512KB
-							#register "rom_address" = "0xfff00000" #1024KB
-							#register "rom_address" = "0xffe00000" #2048KB
-							#register "rom_address" = "0xffc00000" #4096KB
 						end
 					end
 					device pci 2.0 on end # PCIE P2P bridge (external graphics) 0x7913
@@ -36,10 +31,6 @@ 
 					device pci 6.0 on end # PCIE P2P bridge 0x7916
 					device pci 7.0 on end # PCIE P2P bridge 0x7917
 					device pci 8.0 off end # NB/SB Link P2P bridge
-					register "vga_rom_address" = "0xfff80000"
-					#register "vga_rom_address" = "0xfff00000"
-					#register "vga_rom_address" = "0xffe00000"
-					#register "vga_rom_address" = "0xffc00000"
 					register "gpp_configuration" = "4"
 					register "port_enable" = "0xfc"
 					register "gfx_dev2_dev3" = "1"
Index: src/mainboard/ibm/e326/Config.lb
===================================================================
--- src/mainboard/ibm/e326/Config.lb	(Revision 4886)
+++ src/mainboard/ibm/e326/Config.lb	(Arbeitskopie)
@@ -127,7 +127,6 @@ 
 						device pci 1.0 off end
                                                 chip drivers/pci/onboard
                                                         device pci 5.0 on end # ATI Rage XL
-                                                        register "rom_address" = "0xfff80000"
                                                 end
 					end
 					device pci 1.0 on
Index: src/mainboard/ibm/e326/devicetree.cb
===================================================================
--- src/mainboard/ibm/e326/devicetree.cb	(Revision 4886)
+++ src/mainboard/ibm/e326/devicetree.cb	(Arbeitskopie)
@@ -23,7 +23,6 @@ 
 						device pci 1.0 off end
                                                 chip drivers/pci/onboard
                                                         device pci 5.0 on end # ATI Rage XL
-                                                        register "rom_address" = "0xfff80000"
                                                 end
 					end
 					device pci 1.0 on
Index: src/mainboard/intel/d945gclf/Config.lb
===================================================================
--- src/mainboard/intel/d945gclf/Config.lb	(Revision 4886)
+++ src/mainboard/intel/d945gclf/Config.lb	(Arbeitskopie)
@@ -152,9 +152,6 @@ 
 		device pci 01.0 off end # i945 PCIe root port
 		chip drivers/pci/onboard
 			device pci 02.0 on end # vga controller
-			# register "rom_address" = "0xfffc0000"	# 256 KB image
-			# register "rom_address" = "0xfff80000"	# 512 KB image
-			# register "rom_address" = "0xfff00000" # 1 MB image
 		end
 		device pci 02.1 on end # display controller
 
Index: src/mainboard/intel/d945gclf/devicetree.cb
===================================================================
--- src/mainboard/intel/d945gclf/devicetree.cb	(Revision 4886)
+++ src/mainboard/intel/d945gclf/devicetree.cb	(Arbeitskopie)
@@ -30,9 +30,6 @@ 
 		device pci 01.0 off end # i945 PCIe root port
 		chip drivers/pci/onboard
 			device pci 02.0 on end # vga controller
-			# register "rom_address" = "0xfffc0000"	# 256 KB image
-			# register "rom_address" = "0xfff80000"	# 512 KB image
-			# register "rom_address" = "0xfff00000" # 1 MB image
 		end
 		device pci 02.1 on end # display controller
 
Index: src/mainboard/asus/mew-vm/Config.lb
===================================================================
--- src/mainboard/asus/mew-vm/Config.lb	(Revision 4886)
+++ src/mainboard/asus/mew-vm/Config.lb	(Arbeitskopie)
@@ -99,7 +99,6 @@ 
 		device pci 1.0 on # Onboard Video
 			#chip drivers/pci/onboard
 			#	device pci 1.0 on end
-			#	register "rom_address" = "0xfff80000"
 		        #end
 		end
 		chip southbridge/intel/i82801xx # Southbridge
@@ -109,7 +108,6 @@ 
 			device pci 1e.0 on # PCI Bridge
 				#chip drivers/pci/onboard
 				#	device pci 1.0 on end
-				#	register "rom_address" = "0xfff80000"
 			        #end
 			end
 			device pci 1f.0 on  # ISA/LPC? Bridge
Index: src/mainboard/asus/mew-vm/devicetree.cb
===================================================================
--- src/mainboard/asus/mew-vm/devicetree.cb	(Revision 4886)
+++ src/mainboard/asus/mew-vm/devicetree.cb	(Arbeitskopie)
@@ -4,7 +4,6 @@ 
 		device pci 1.0 on # Onboard Video
 			#chip drivers/pci/onboard
 			#	device pci 1.0 on end
-			#	register "rom_address" = "0xfff80000"
 		        #end
 		end
 		chip southbridge/intel/i82801xx # Southbridge
@@ -14,7 +13,6 @@ 
 			device pci 1e.0 on # PCI Bridge
 				#chip drivers/pci/onboard
 				#	device pci 1.0 on end
-				#	register "rom_address" = "0xfff80000"
 			        #end
 			end
 			device pci 1f.0 on  # ISA/LPC? Bridge