Patchwork WPCD376I Super I/O support

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Submitter Sean Young
Date 2009-10-29 11:23:14
Message ID <20091029112314.GA86219@atlantis.8hz.com>
Download mbox | patch
Permalink /patch/511/
State Accepted
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Comments

Sean Young - 2009-10-29 11:23:14
On the Intel DG33TL motherboard, the Super I/O is an WPCD376I. Output:

# ./superiotool -d
Found Winbond WPCD376I (sid=0xf1, srid=0x91) at 0x2e
Register dump:
idx 10 12 13 20 21 22 23 24  25 26 27 28 29 2a 2b 2c  2d 2e 2f
val 00 00 00 f1 91 00 00 c0  01 00 91 00 91 00 00 00  00 00 00
def 00 00 00 f1 11 00 00 00  RR 00 MM RR 01 2e RR RR  RR RR RR
LDN 0x00 (Floppy)
idx 30 60 61 70 71 74 75 f0  f1 f8
val 00 00 00 06 03 02 04 24  00 24
def 00 03 f2 06 03 02 04 24  00 24
LDN 0x01 (Parallel port)
idx 30 60 61 70 71 74 75 f0  f8
val 00 00 00 07 02 04 04 92  04
def 00 02 78 07 02 04 04 f2  07
LDN 0x02 (IR)
idx 30 60 61 70 71 74 75 f0
val 00 00 00 03 03 04 04 02
def 00 02 f8 03 03 04 04 02
LDN 0x03 (COM1)
idx 30 60 61 70 71 74 75 f0
val 01 03 f8 04 03 04 04 02
def 00 03 f8 04 03 04 04 02
LDN 0x04 (System wake-up control (SWC))
idx 30 50 60 61 62 63 70 71  74 75
val 01 00 06 d0 06 c0 00 03  04 04
def 00 00 00 00 00 00 00 03  04 04
LDN 0x05 (Mouse)
idx 30 70 71 74 75
val 01 0c 02 04 04
def 00 0c 02 04 04
LDN 0x06 (Keyboard)
idx 30 60 61 62 63 70 71 74  75 f0
val 01 00 60 00 64 01 02 04  04 40
def 00 00 60 00 64 01 02 04  04 40
LDN 0x07 (GPIO)
idx 30 50 60 61 70 71 74 75  f0 f1 f2 f3 f8
val 01 00 06 80 00 03 04 04  07 00 00 00 00
def 00 00 00 00 00 03 04 04  00 MM 00 MM 01

Signed-off-by: Sean Young <sean@mess.org>
Uwe Hermann - 2009-10-29 19:54:47
Hi,

On Thu, Oct 29, 2009 at 11:23:14AM +0000, Sean Young wrote:
> On the Intel DG33TL motherboard, the Super I/O is an WPCD376I. Output:
> 
> Signed-off-by: Sean Young <sean@mess.org>
 
Thanks a lot for the output and for the patch! I'll commit the code
soon, just two questions. The dump will be linked to from the wiki, so
we have a reference for later usage.


> @@ -532,17 +572,28 @@
>  		rev = INB(port + 1);
>  	}
>  
> -	if (superio_unknown(reg_table, id)) {
> +	/*
> +	 * NSC PC8374L has id 0xf1, rev 0b000x xxxx according to datasheet
> +	 * Winbond WPCD376I has id 0xf1, rev 0b100x xxxx according to datasheet

Why is the code for this Winbond Super I/O in the nsc.c file? I assume
the WPCD376I doesn't need any special enter/exit procedures? But even if
that's the case, shouldn't the code still work fine in the winbond.c file?


> @@ -512,6 +551,7 @@
>  void probe_idregs_nsc(uint16_t port)
>  {
>  	uint8_t id, rev;
> +	int16_t magic;

This can be uint16_t right? Or is there some reason to make it signed
explicitly?

  
Thanks, Uwe.
Sean Young - 2009-10-30 12:14:06
On Thu, Oct 29, 2009 at 08:54:47PM +0100, Uwe Hermann wrote:
> Hi,
> 
> On Thu, Oct 29, 2009 at 11:23:14AM +0000, Sean Young wrote:
> > On the Intel DG33TL motherboard, the Super I/O is an WPCD376I. Output:
> > 
> > Signed-off-by: Sean Young <sean@mess.org>
>  
> Thanks a lot for the output and for the patch! I'll commit the code
> soon, just two questions. The dump will be linked to from the wiki, so
> we have a reference for later usage.
> 
> 
> > @@ -532,17 +572,28 @@
> >  		rev = INB(port + 1);
> >  	}
> >  
> > -	if (superio_unknown(reg_table, id)) {
> > +	/*
> > +	 * NSC PC8374L has id 0xf1, rev 0b000x xxxx according to datasheet
> > +	 * Winbond WPCD376I has id 0xf1, rev 0b100x xxxx according to datasheet
> 
> Why is the code for this Winbond Super I/O in the nsc.c file? I assume
> the WPCD376I doesn't need any special enter/exit procedures? But even if
> that's the case, shouldn't the code still work fine in the winbond.c file?

These two super I/O chips are almost identical -- as you can see above, it's
just a revision. Current svn version misdetects the WPCD376I as a PC8374L.

In winbond.c, there is some code to do the detection four times, after 
writing 0x88, 0x89, etc do the super I/O port. This is completely ignored
by the WPCD376I, causing the chip to be detected four times if it does 
there.

winbond.c can be changed to detect the WPCD376I, but since it looks and
smells like an NSC chip, it fits better in nsc.c.

> > @@ -512,6 +551,7 @@
> >  void probe_idregs_nsc(uint16_t port)
> >  {
> >  	uint8_t id, rev;
> > +	int16_t magic;
> 
> This can be uint16_t right? Or is there some reason to make it signed
> explicitly?

There is no need for it to be signed. Unsigned makes more sense actually.

Thanks,
Sean
Uwe Hermann - 2009-11-09 22:37:55
Hi,

On Fri, Oct 30, 2009 at 12:14:06PM +0000, Sean Young wrote:
> > > +	int16_t magic;
> > 
> > This can be uint16_t right? Or is there some reason to make it signed
> > explicitly?
> 
> There is no need for it to be signed. Unsigned makes more sense actually.

Fixed.

Patch comitted in r4931, thanks! I also updated the wiki and linked to
your sample dump there.


Uwe.

Patch

Index: nsc.c
===================================================================
--- nsc.c	(revision 4887)
+++ nsc.c	(working copy)
@@ -400,7 +400,7 @@ 
 		{EOT}}},
 	{0xf0, "PC87372", {
 		{EOT}}},
-	{0xf1, "PC8374L", {
+	{0x0f1, "PC8374L", {
 		{NOLDN, NULL,
 			{0x10,0x12,0x13,0x20,0x21,0x22,0x23,0x24,0x25,0x26,
 			 0x27,0x28,0x29,0x2a,0x2b,0x2c,0x2d,0x2e,0x2f,EOT},
@@ -442,6 +442,45 @@ 
 			{0x30,0x50,0x60,0x61,0x70,0x71,0x74,0x75,0xf0,EOT},
 			{0x00,0x00,0x00,0x00,0x00,0x03,0x04,0x04,0x05,EOT}},
 		{EOT}}},
+	{0x8f1, "WPCD376I", {
+		{NOLDN, NULL,
+			{0x10,0x12,0x13,0x20,0x21,0x22,0x23,0x24,0x25,0x26,
+			 0x27,0x28,0x29,0x2a,0x2b,0x2c,0x2d,0x2e,0x2f,EOT},
+			{0x00,0x00,0x00,0xf1,0x11,0x00,0x00,0x00,RSVD,0x00,
+			 MISC,RSVD,0x01,0x2e,RSVD,RSVD,RSVD,RSVD,RSVD,EOT}},
+		{0x0, "Floppy",
+			{0x30,0x60,0x61,0x70,0x71,0x74,0x75,0xf0,0xf1,0xf8,
+			 EOT},
+			{0x00,0x03,0xf2,0x06,0x03,0x02,0x04,0x24,0x00,0x24,
+			 EOT}},
+		{0x1, "Parallel port",
+			{0x30,0x60,0x61,0x70,0x71,0x74,0x75,0xf0,0xf8,EOT},
+			{0x00,0x02,0x78,0x07,0x02,0x04,0x04,0xf2,0x07,EOT}},
+		{0x2, "IR",
+			{0x30,0x60,0x61,0x70,0x71,0x74,0x75,0xf0,EOT},
+			{0x00,0x02,0xf8,0x03,0x03,0x04,0x04,0x02,EOT}},
+		{0x3, "COM1",
+			{0x30,0x60,0x61,0x70,0x71,0x74,0x75,0xf0,EOT},
+			{0x00,0x03,0xf8,0x04,0x03,0x04,0x04,0x02,EOT}},
+		{0x4, "System wake-up control (SWC)",
+			{0x30,0x50,0x60,0x61,0x62,0x63,0x70,0x71,0x74,0x75,
+			 EOT},
+			{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x03,0x04,0x04,
+			 EOT}},
+		{0x5, "Mouse",
+			{0x30,0x70,0x71,0x74,0x75,EOT},
+			{0x00,0x0c,0x02,0x04,0x04,EOT}},
+		{0x6, "Keyboard",
+			{0x30,0x60,0x61,0x62,0x63,0x70,0x71,0x74,0x75,0xf0,
+			 EOT},
+			{0x00,0x00,0x60,0x00,0x64,0x01,0x02,0x04,0x04,0x40,
+			 EOT}},
+		{0x7, "GPIO",
+			{0x30,0x50,0x60,0x61,0x70,0x71,0x74,0x75,0xf0,0xf1,
+			 0xf2,0xf3,0xf8,EOT},
+			{0x00,0x00,0x00,0x00,0x00,0x03,0x04,0x04,0x00,MISC,
+			 0x00,MISC,0x01,EOT}},
+		{EOT}}},
 	{0xf2, "PC87427", {
 		/* SRID[7..5] is marked as "not applicable for the PC87427". */
 		{NOLDN, NULL,
@@ -512,6 +551,7 @@ 
 void probe_idregs_nsc(uint16_t port)
 {
 	uint8_t id, rev;
+	int16_t magic;
 
 	probing_for("NSC", "", port);
 
@@ -532,17 +572,28 @@ 
 		rev = INB(port + 1);
 	}
 
-	if (superio_unknown(reg_table, id)) {
+	/*
+	 * NSC PC8374L has id 0xf1, rev 0b000x xxxx according to datasheet
+	 * Winbond WPCD376I has id 0xf1, rev 0b100x xxxx according to datasheet
+	 */
+	if (id == 0xf1)
+		magic = ((rev & 0xe0) << 4) | id;
+	else
+		magic = id;
+
+	if (superio_unknown(reg_table, magic)) {
 		if (verbose)
 			printf(NOTFOUND "sid=0x%02x, srid=0x%02x\n", id, rev);
 		return;
 	}
 
-	printf("Found NSC %s (sid=0x%02x, srid=0x%02x) at 0x%x\n",
-	       get_superio_name(reg_table, id), id, rev, port);
+	printf("Found %s %s (sid=0x%02x, srid=0x%02x) at 0x%x\n",
+	       magic == 0x8f1 ? "Winbond" : "NSC",
+	       get_superio_name(reg_table, magic), id, rev, port);
 	chip_found = 1;
 
-	dump_superio("NSC", reg_table, port, id, LDN_SEL);
+	dump_superio(magic == 0x8f1 ? "Winbond" : "NSC",
+		     reg_table, port, magic, LDN_SEL);
 }
 
 void print_nsc_chips(void)