===================================================================
@@ -52,6 +52,9 @@
#define PCI_DEVICE_ID_INTEL_82945GM 0x27a0
#define PCI_DEVICE_ID_INTEL_PM965 0x2a00
#define PCI_DEVICE_ID_INTEL_82975X 0x277c
+#define PCI_DEVICE_ID_INTEL_82Q35 0x29b0
+#define PCI_DEVICE_ID_INTEL_82G33 0x29c0
+#define PCI_DEVICE_ID_INTEL_82Q33 0x29d0
#define PCI_DEVICE_ID_INTEL_X58 0x3405
#define PCI_DEVICE_ID_INTEL_82443LX 0x7180
===================================================================
@@ -39,6 +39,9 @@
epbar_phys = pci_read_long(nb, 0x40) & 0xfffffffe;
break;
case PCI_DEVICE_ID_INTEL_PM965:
+ case PCI_DEVICE_ID_INTEL_82Q35:
+ case PCI_DEVICE_ID_INTEL_82G33:
+ case PCI_DEVICE_ID_INTEL_82Q33:
epbar_phys = pci_read_long(nb, 0x40) & 0xfffffffe;
epbar_phys |= ((uint64_t)pci_read_long(nb, 0x44)) << 32;
break;
@@ -86,6 +89,9 @@
dmibar_phys = pci_read_long(nb, 0x4c) & 0xfffffffe;
break;
case PCI_DEVICE_ID_INTEL_PM965:
+ case PCI_DEVICE_ID_INTEL_82Q35:
+ case PCI_DEVICE_ID_INTEL_82G33:
+ case PCI_DEVICE_ID_INTEL_82Q33:
dmibar_phys = pci_read_long(nb, 0x68) & 0xfffffffe;
dmibar_phys |= ((uint64_t)pci_read_long(nb, 0x6c)) << 32;
break;
@@ -135,6 +141,9 @@
pciexbar_reg = pci_read_long(nb, 0x48);
break;
case PCI_DEVICE_ID_INTEL_PM965:
+ case PCI_DEVICE_ID_INTEL_82Q35:
+ case PCI_DEVICE_ID_INTEL_82G33:
+ case PCI_DEVICE_ID_INTEL_82Q33:
pciexbar_reg = pci_read_long(nb, 0x60);
pciexbar_reg |= ((uint64_t)pci_read_long(nb, 0x64)) << 32;
break;
===================================================================
@@ -40,6 +40,9 @@
mchbar_phys = pci_read_long(nb, 0x44) & 0xfffffffe;
break;
case PCI_DEVICE_ID_INTEL_PM965:
+ case PCI_DEVICE_ID_INTEL_82Q35:
+ case PCI_DEVICE_ID_INTEL_82G33:
+ case PCI_DEVICE_ID_INTEL_82Q33:
mchbar_phys = pci_read_long(nb, 0x48) & 0xfffffffe;
mchbar_phys |= ((uint64_t)pci_read_long(nb, 0x4c)) << 32;
break;
===================================================================
@@ -39,6 +39,9 @@
{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82945GM, "i945GM" },
{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_PM965, "PM965" },
{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82975X, "i975X" },
+ { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82Q35, "Q35" },
+ { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82G33, "P35/G33/G31/P31" },
+ { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82Q33, "Q33" },
{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_X58, "X58" },
{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH10R, "ICH10R" },
{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH8M, "ICH8-M" },
Here is a patch for inteltool to print the registers values for the P31..Q35 chipset. The registers are (as far as I can tell) unchanged with respect to those of the PM965. I've no strong ideas on the names: I've chosen PCI_DEVICE_ID_INTEL_82[PQG]3[135] as Northbridge names, they can obviously be changed to anything else. I've given "Q35", "P35/G33/G31/P31" and "Q33" as descriptions, they can also be freely changed. Signed-off-by: Loïc Grenié <loic.grenie@gmail.com> Description: adds 82Q35/P35/Q33/G33/G31/P31 capability. Please consider for applying, Thanks, Loïc