Drop all hardcoded ram_check() calls from coreboot for now.
The function itself remains, to allow developers and users to add it
to auto.c / cache_as_ram_auto.c as needed to do a RAM init sanity check
during bringup or if strange errors are encountered.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
===================================================================
@@ -45,5 +45,4 @@
report_bist_failure(bist);
cs5530_enable_rom();
sdram_init();
- /* ram_check(0, 640 * 1024); */
}
===================================================================
@@ -122,7 +122,5 @@
ddr_ram_setup(&ctrl);
- /* ram_check(0, 640 * 1024); */
-
print_spew("Leaving auto.c:main()\r\n");
}
===================================================================
@@ -51,7 +51,4 @@
/* Initialize RAM. */
sdram_init();
-
- /* Check whether RAM works. */
- /* ram_check(0, 640 * 1024); */
}
===================================================================
@@ -51,7 +51,4 @@
/* Initialize RAM. */
sdram_init();
-
- /* Check whether RAM works. */
- /* ram_check(0, 640 * 1024); */
}
===================================================================
@@ -119,9 +119,5 @@
sdram_set_spd_registers(memctrl);
sdram_enable(0, memctrl);
- /* Check RAM. */
- /* ram_check(0, 640 * 1024); */
- /* ram_check(64512 * 1024, 65536 * 1024); */
-
ac97_io_enable();
}
===================================================================
@@ -121,19 +121,7 @@
// dump_bar14(PCI_DEV(0, 0x00, 0));
#endif
-#if 0 // temporarily disabled
- /* Check the first 1M */
-// ram_check(0x00000000, 0x000100000);
-// ram_check(0x00000000, 0x000a0000);
- ram_check(0x00100000, 0x01000000);
- /* check the first 1M in the 3rd Gig */
- ram_check(0x30100000, 0x31000000);
-#endif
#if 0
- ram_check(0x00000000, 0x02000000);
-#endif
-
-#if 0
while(1) {
hlt();
}
===================================================================
@@ -132,19 +132,7 @@
dump_bar14(PCI_DEV(0, 0x00, 0));
#endif
-#if 0 // temporarily disabled
- /* Check the first 1M */
-// ram_check(0x00000000, 0x000100000);
-// ram_check(0x00000000, 0x000a0000);
- ram_check(0x00100000, 0x01000000);
- /* check the first 1M in the 3rd Gig */
- ram_check(0x30100000, 0x31000000);
-#endif
#if 0
- ram_check(0x00000000, 0x02000000);
-#endif
-
-#if 0
while(1) {
hlt();
}
===================================================================
@@ -133,19 +133,7 @@
//dump_bar14(PCI_DEV(0, 0x00, 0));
#endif
-#if 0 // temporarily disabled
- /* Check the first 1M */
-// ram_check(0x00000000, 0x000100000);
-// ram_check(0x00000000, 0x000a0000);
- ram_check(0x00100000, 0x01000000);
- /* check the first 1M in the 3rd Gig */
- ram_check(0x30100000, 0x31000000);
-#endif
#if 0
- ram_check(0x00000000, 0x02000000);
-#endif
-
-#if 0
while(1) {
hlt();
}
===================================================================
@@ -132,19 +132,7 @@
//dump_bar14(PCI_DEV(0, 0x00, 0));
#endif
-#if 0 // temporarily disabled
- /* Check the first 1M */
-// ram_check(0x00000000, 0x000100000);
-// ram_check(0x00000000, 0x000a0000);
- ram_check(0x00100000, 0x01000000);
- /* check the first 1M in the 3rd Gig */
- ram_check(0x30100000, 0x31000000);
-#endif
#if 0
- ram_check(0x00000000, 0x02000000);
-#endif
-
-#if 0
while(1) {
hlt();
}
===================================================================
@@ -133,20 +133,7 @@
dump_bar14(PCI_DEV(0, 0x00, 0));
#endif
-#if 0 // temporarily disabled
- /* Check the first 1M */
-// ram_check(0x00000000, 0x000100000);
-// ram_check(0x00000000, 0x000a0000);
-// ram_check(0x00100000, 0x01000000);
- ram_check(0x00100000, 0x00100100);
- /* check the first 1M in the 3rd Gig */
-// ram_check(0x30100000, 0x31000000);
-#endif
#if 0
- ram_check(0x00000000, 0x02000000);
-#endif
-
-#if 0
while(1) {
hlt();
}
===================================================================
@@ -133,20 +133,7 @@
dump_bar14(PCI_DEV(0, 0x00, 0));
#endif
-#if 0 // temporarily disabled
- /* Check the first 1M */
-// ram_check(0x00000000, 0x000100000);
-// ram_check(0x00000000, 0x000a0000);
-// ram_check(0x00100000, 0x01000000);
- ram_check(0x00100000, 0x00100100);
- /* check the first 1M in the 3rd Gig */
-// ram_check(0x30100000, 0x31000000);
-#endif
#if 0
- ram_check(0x00000000, 0x02000000);
-#endif
-
-#if 0
while(1) {
hlt();
}
===================================================================
@@ -69,5 +69,4 @@
sdram_set_registers();
sdram_set_spd_registers();
sdram_enable();
- /* ram_check(0, 640 * 1024); */
}
===================================================================
@@ -448,6 +448,7 @@
sdram_dump_mchbar_registers();
#endif
+#if 0
{
/* This will not work if TSEG is in place! */
u32 tom = pci_read_config32(PCI_DEV(0,2,0), 0x5c);
@@ -457,7 +458,9 @@
//ram_check(0x00100000, tom);
}
#endif
+
#endif
+#endif
MCHBAR16(SSKPD) = 0xCAFE;
===================================================================
@@ -69,5 +69,4 @@
sdram_set_registers();
sdram_set_spd_registers();
sdram_enable();
- /* ram_check(0, 640 * 1024); */
}
===================================================================
@@ -69,5 +69,4 @@
sdram_set_registers();
sdram_set_spd_registers();
sdram_enable();
- /* ram_check(0, 640 * 1024); */
}
===================================================================
@@ -69,5 +69,4 @@
sdram_set_registers();
sdram_set_spd_registers();
sdram_enable();
- /* ram_check(0, 640 * 1024); */
}
===================================================================
@@ -132,7 +132,4 @@
print_err("done cpuRegInit\n");
sdram_initialize(1, memctrl); //GX3 OK almost
-
- /* Check all of memory */
- //ram_check(0x00000000, 640*1024);
}
===================================================================
@@ -93,9 +93,6 @@
sdram_initialize(1, memctrl);
- /* Check all of memory */
- ram_check(0x00000000, 640*1024);
-
/* Switch from Cache as RAM to real RAM */
/* There are two ways we could think about this.
1. If we are using the auto.inc ROMCC way, the stack is going to be re-setup in the code following this code.
===================================================================
@@ -127,17 +127,4 @@
dump_pci_device(PCI_DEV(0, 0, 0));
#endif
-/*
-#if 0
- ram_check(0x00000000, msr.lo+(msr.hi<<32));
-#else
-#if 0
- // Check 16MB of memory @ 0
- ram_check(0x00000000, 0x01000000);
-#else
- // Check 16MB of memory @ 2GB
- ram_check(0x80000000, 0x81000000);
-#endif
-#endif
-*/
}
===================================================================
@@ -237,16 +237,6 @@
dump_pci_device(PCI_DEV(0, 0, 0));
#endif
-#if 0
- print_err("RAM CHECK!\r\n");
- // Check 16MB of memory @ 0
- ram_check(0x00000000, 0x01000000);
-#endif
-#if 0
- print_err("RAM CHECK for 32 MB!\r\n");
- // Check 32MB of memory @ 0
- ram_check(0x00000000, 0x02000000);
-#endif
#if 1
{
volatile unsigned char *src = (unsigned char *) 0x2000000 + 0x60000;
===================================================================
@@ -65,5 +65,4 @@
sdram_set_registers();
sdram_set_spd_registers();
sdram_enable();
- /* ram_check(0, 640 * 1024); */
}
===================================================================
@@ -188,7 +188,4 @@
print_err("done cpuRegInit\n");
sdram_initialize(1, memctrl);
-
- /* Check all of memory */
- //ram_check(0x00000000, 640*1024);
}
===================================================================
@@ -188,7 +188,4 @@
print_err("done cpuRegInit\n");
sdram_initialize(1, memctrl);
-
- /* Check all of memory */
- //ram_check(0x00000000, 640*1024);
}
===================================================================
@@ -166,13 +166,6 @@
#if 1
identify_system();
#endif
-
-#if 0
- // Check 32MB of memory @ 0 (very slow!)
- print_err("Checking memory:\r\n");
- ram_check(0x00000000, 0x000a0000);
- ram_check(0x000b0000, 0x02000000);
-#endif
TS5300_LED_OFF;
}
===================================================================
@@ -142,7 +142,4 @@
sdram_initialize(1, memctrl);
msr_init();
-
- /* Check all of memory */
- //ram_check(0x00000000, 640*1024);
}
===================================================================
@@ -126,9 +126,6 @@
sdram_initialize(1, memctrl);
- /* Check memory. */
- /* ram_check(0x00000000, 640 * 1024); */
-
/* Memory is setup. Return to cache_as_ram.inc and continue to boot. */
return;
}
===================================================================
@@ -365,19 +365,12 @@
dump_pci_device_range(PCI_DEV(0, 0x18, 3), 0, 0x200);
*/
-// ram_check(0x00200000, 0x00200000 + (640 * 1024));
-// ram_check(0x40200000, 0x40200000 + (640 * 1024));
-
-
// die("After MCT init before CAR disabled.");
post_code(0x42);
printk_debug("\n*** Yes, the copy/decompress is taking a while, FIXME!\n");
post_cache_as_ram(); // BSP switch stack to ram, copy then execute LB.
post_code(0x43); // Should never see this post code.
-
-
}
-
#endif /* CONFIG_USE_FAILOVER_IMAGE==0 */
===================================================================
@@ -127,9 +127,6 @@
sdram_initialize(1, memctrl);
- /* Check memory. */
- /* ram_check(0x00000000, 640 * 1024); */
-
/* Memory is setup. Return to cache_as_ram.inc and continue to boot. */
return;
}
===================================================================
@@ -69,5 +69,4 @@
sdram_set_registers();
sdram_set_spd_registers();
sdram_enable();
- /* ram_check(0, 640 * 1024); */
}
===================================================================
@@ -119,9 +119,5 @@
sdram_set_spd_registers(memctrl);
sdram_enable(0, memctrl);
- /* Check RAM. */
- /* ram_check(0, 640 * 1024); */
- /* ram_check(130048 * 1024, 131072 * 1024); */
-
ac97_io_enable();
}
===================================================================
@@ -58,5 +58,4 @@
sdram_set_registers();
sdram_set_spd_registers();
sdram_enable();
- /* ram_check(0, 640 * 1024); */
}
===================================================================
@@ -72,5 +72,4 @@
sdram_set_registers();
sdram_set_spd_registers();
sdram_enable();
- /* ram_check(0, 640 * 1024); */
}
===================================================================
@@ -52,7 +52,4 @@
/* Initialize RAM. */
sdram_init();
-
- /* Check RAM. */
- /* ram_check(0x00000000, 640 * 1024); */
}
===================================================================
@@ -130,8 +130,6 @@
sdram_initialize(1, memctrl);
- /* ram_check(0, 640 * 1024); */
-
/* Memory is setup. Return to cache_as_ram.inc and continue to boot. */
return;
}
===================================================================
@@ -57,7 +57,4 @@
/* Initialize RAM. */
sdram_init();
-
- /* Check RAM. */
- /* ram_check(0x00000000, 640 * 1024); */
}
===================================================================
@@ -64,5 +64,4 @@
sdram_set_registers();
sdram_set_spd_registers();
sdram_enable();
- /* ram_check(0, 640 * 1024); */
}
===================================================================
@@ -69,5 +69,4 @@
sdram_set_registers();
sdram_set_spd_registers();
sdram_enable();
- /* ram_check(0, 640 * 1024); */
}
===================================================================
@@ -173,10 +173,6 @@
sdram_initialize(1, memctrl);
- /* Check memory */
- /* Enable this only if you are having questions. */
- /* ram_check(0, 640 * 1024); */
-
/* Switch from Cache as RAM to real RAM.
*
* There are two ways we could think about this.
===================================================================
@@ -209,9 +209,6 @@
print_debug(" \n");
}*/
- /* Check memory. */
- /* ram_check(0x00000000, 640 * 1024); */
-
/* Memory is setup. Return to cache_as_ram.inc and continue to boot */
return;
}
===================================================================
@@ -44,5 +44,4 @@
report_bist_failure(bist);
cs5530_enable_rom();
sdram_init();
- /* ram_check(0, 640 * 1024); */
}
===================================================================
@@ -51,7 +51,4 @@
/* Initialize RAM. */
sdram_init();
-
- /* Check whether RAM works. */
- /* ram_check(0x00000000, 0x4000); */
}
===================================================================
@@ -72,5 +72,4 @@
sdram_set_registers();
sdram_set_spd_registers();
sdram_enable();
- /* ram_check(0, 640 * 1024); */
}
===================================================================
@@ -161,9 +161,6 @@
sdram_initialize(1, memctrl);
- /* Check memory. */
- /* ram_check(0x00000000, 640 * 1024); */
-
/* Memory is setup. Return to cache_as_ram.inc and continue to boot. */
return;
}
===================================================================
@@ -128,9 +128,5 @@
outb( temp, 0x4F);
temp = inb(0x4F); //watchdog function. Make sure to let the other Bits unchanged!
print_debug_hex8(temp);print_debug("\n");
- /* Check all of memory */
-// ram_check(0, 16384);
- ram_check(0x20000, 0x24000);
-// ram_check(0x00000000, 640*1024);
}
===================================================================
@@ -230,9 +230,6 @@
sdram_initialize(1, memctrl);
- /* Check memory. */
- /* ram_check(0, 640 * 1024); */
-
/* Memory is setup. Return to cache_as_ram.inc and continue to boot. */
return;
}
===================================================================
@@ -560,7 +560,6 @@
print_debug("Resume from S3, RAM init was ignored\r\n");
} else {
ddr2_ram_setup();
- ram_check(0, 640 * 1024);
}
#endif
===================================================================
@@ -122,27 +122,6 @@
ddr_ram_setup((const struct mem_controller *)0);
- /* Check all of memory */
-#if 0
- ram_check(0x00000000, msr.lo);
-#endif
-#if 0
- static const struct {
- unsigned long lo, hi;
- } check_addrs[] = {
- /* Check 16MB of memory @ 0*/
- { 0x00000000, 0x01000000 },
-#if TOTAL_CPUS > 1
- /* Check 16MB of memory @ 2GB */
- { 0x80000000, 0x81000000 },
-#endif
- };
- int i;
- for(i = 0; i < ARRAY_SIZE(check_addrs); i++) {
- ram_check(check_addrs[i].lo, check_addrs[i].hi);
- }
-#endif
-
if (bist == 0) {
print_debug(" Doing MTRR init.\r\n");
early_mtrr_init();
===================================================================
@@ -154,7 +154,5 @@
early_mtrr_init();
}
- //ram_check(0, 640 * 1024);
-
print_spew("Leaving auto.c:main()\r\n");
}
===================================================================
@@ -119,7 +119,5 @@
ddr_ram_setup(&ctrl);
- /* ram_check(0, 640 * 1024); */
-
print_spew("Leaving auto.c:main()\r\n");
}
===================================================================
@@ -104,25 +104,4 @@
sdram_set_registers((const struct mem_controller *) 0);
sdram_set_spd_registers((const struct mem_controller *) 0);
sdram_enable(0, (const struct mem_controller *) 0);
-
- /* Check all of memory */
-#if 0
- ram_check(0x00000000, msr.lo);
-#endif
-#if 0
- static const struct {
- unsigned long lo, hi;
- } check_addrs[] = {
- /* Check 16MB of memory @ 0*/
- { 0x00000000, 0x01000000 },
-#if TOTAL_CPUS > 1
- /* Check 16MB of memory @ 2GB */
- { 0x80000000, 0x81000000 },
-#endif
- };
- int i;
- for(i = 0; i < ARRAY_SIZE(check_addrs); i++) {
- ram_check(check_addrs[i].lo, check_addrs[i].hi);
- }
-#endif
}
===================================================================
@@ -80,6 +80,4 @@
report_bist_failure(bist);
ddr_ram_setup(&ctrl);
-
- /* ram_check(0, 640 * 1024); */
}
===================================================================
@@ -351,20 +351,7 @@
// dump_bar14(PCI_DEV(0, 0x00, 0));
#endif
-#if 1 // temporarily disabled
- /* Check the first 1M */
-// ram_check(0x00000000, 0x000100000);
-// ram_check(0x00000000, 0x000a0000);
-// ram_check(0x00100000, 0x01000000);
- ram_check(0x00100000, 0x00100100);
- /* check the first 1M in the 3rd Gig */
-// ram_check(0x30100000, 0x31000000);
-#endif
#if 0
- ram_check(0x00000000, 0x02000000);
-#endif
-
-#if 0
while(1) {
hlt();
}
===================================================================
@@ -72,5 +72,4 @@
sdram_set_registers();
sdram_set_spd_registers();
sdram_enable();
- /* ram_check(0, 640 * 1024); */
}
===================================================================
@@ -362,6 +362,7 @@
#if defined(DEBUG_RAM_SETUP)
sdram_dump_mchbar_registers();
+#if 0
{
/* This will not work if TSEG is in place! */
u32 tom = pci_read_config32(PCI_DEV(0,2,0), 0x5c);
@@ -371,8 +372,10 @@
ram_check(0x00100000, tom);
}
#endif
+
#endif
#endif
+#endif
MCHBAR16(SSKPD) = 0xCAFE;
===================================================================
@@ -69,5 +69,4 @@
sdram_set_registers();
sdram_set_spd_registers();
sdram_enable();
- /* ram_check(0, 640 * 1024); */
}
===================================================================
@@ -69,12 +69,4 @@
sdram_set_registers();
sdram_set_spd_registers();
sdram_enable();
-#if 0
- ram_check(0, 640 * 1024); /* DOS-area */
- ram_check(0x00100000, 0x00400000); /* 1MB to 4MB */
- ram_check(0x00100000, 0x03ffffff); /* 1MB to 64MB- */
- ram_check(0x03fff000, 0x04000010); /* Across 64MB boundary */
- ram_check(0x07ffff00, 0x07fffff0); /* Just below 128MB */
- ram_check(0x00100000, 0x07ffffff); /* 1MB to 128MB- */
-#endif
}
===================================================================
@@ -69,5 +69,4 @@
sdram_set_registers();
sdram_set_spd_registers();
sdram_enable();
- /* ram_check(0, 640 * 1024); */
}
===================================================================
@@ -65,5 +65,4 @@
sdram_set_registers();
sdram_set_spd_registers();
sdram_enable();
- /* ram_check(0, 640 * 1024); */
}
===================================================================
@@ -44,5 +44,4 @@
report_bist_failure(bist);
cs5530_enable_rom();
sdram_init();
- /* ram_check(0, 640 * 1024); */
}
===================================================================
@@ -35,25 +35,4 @@
cs5530_enable_rom();
sdram_init();
-
- /* Check all of memory */
-#if 0
- ram_check(0x00000000, msr.lo);
-#endif
-#if 0
- static const struct {
- unsigned long lo, hi;
- } check_addrs[] = {
- /* Check 16MB of memory @ 0*/
- { 0x00000000, 0x01000000 },
-#if TOTAL_CPUS > 1
- /* Check 16MB of memory @ 2GB */
- { 0x80000000, 0x81000000 },
-#endif
- };
- int i;
- for(i = 0; i < ARRAY_SIZE(check_addrs); i++) {
- ram_check(check_addrs[i].lo, check_addrs[i].hi);
- }
-#endif
}
===================================================================
@@ -124,7 +124,5 @@
ddr_ram_setup(&ctrl);
- /* ram_check(0, 640 * 1024); */
-
print_spew("Leaving auto.c:main()\r\n");
}
===================================================================
@@ -308,15 +308,6 @@
#if defined(DEBUG_RAM_SETUP)
sdram_dump_mchbar_registers();
#endif
-
- {
- /* This will not work if TSEG is in place! */
- u32 tom = pci_read_config32(PCI_DEV(0,2,0), 0x5c);
-
- printk_debug("TOM: 0x%08x\n", tom);
- ram_check(0x00000000, 0x000a0000);
- //ram_check(0x00100000, tom);
- }
#endif
#endif
===================================================================
@@ -107,9 +107,4 @@
#ifdef TRUXTON_DEBUG
dump_bar14(PCI_DEV(0, 0x00, 0));
#endif
-
-#ifdef TRUXTON_DEBUG
- ram_fill(0x00000000, 0x02000000);
- ram_verify(0x00000000, 0x02000000);
-#endif
}
===================================================================
@@ -123,6 +123,4 @@
/* dump_pci_devices(); */
/* dump_pci_device(PCI_DEV(0, 0x00, 0)); */
/* dump_bar14(PCI_DEV(0, 0x00, 0)); */
-
- ram_check(0, 1024 * 1024);
}
===================================================================
@@ -132,18 +132,6 @@
dump_bar14(PCI_DEV(0, 0x00, 0));
#endif
-#if 0 // temporarily disabled
- /* Check the first 1M */
-// ram_check(0x00000000, 0x000100000);
-// ram_check(0x00000000, 0x000a0000);
- ram_check(0x00100000, 0x01000000);
- /* check the first 1M in the 3rd Gig */
- ram_check(0x30100000, 0x31000000);
-#if 0
- ram_check(0x00000000, 0x02000000);
-#endif
-
-#endif
#if 0
while(1) {
hlt();
===================================================================
@@ -64,5 +64,4 @@
sdram_set_registers();
sdram_set_spd_registers();
sdram_enable();
- /* ram_check(0, 640 * 1024); */
}
===================================================================
@@ -69,5 +69,4 @@
sdram_set_registers();
sdram_set_spd_registers();
sdram_enable();
- /* ram_check(0, 640 * 1024); */
}
===================================================================
@@ -72,5 +72,4 @@
sdram_set_registers();
sdram_set_spd_registers();
sdram_enable();
- /* ram_check(0, 640 * 1024); */
}
===================================================================
@@ -72,5 +72,4 @@
sdram_set_registers();
sdram_set_spd_registers();
sdram_enable();
- /* ram_check(0, 640 * 1024); */
}
===================================================================
@@ -72,5 +72,4 @@
sdram_set_registers();
sdram_set_spd_registers();
sdram_enable();
- /* ram_check(0, 640 * 1024); */
}
===================================================================
@@ -72,5 +72,4 @@
sdram_set_registers();
sdram_set_spd_registers();
sdram_enable();
- /* ram_check(0, 640 * 1024); */
}
===================================================================
@@ -64,7 +64,4 @@
sdram_set_registers();
sdram_set_spd_registers();
sdram_enable();
-
- /* Check RAM. */
- /* ram_check(0, 640 * 1024); */
}
===================================================================
@@ -434,7 +434,6 @@
print_debug("Resume from S3, RAM init was ignored\r\n");
} else {
ddr2_ram_setup();
- ram_check(0, 640 * 1024);
}
#endif
//ddr2_ram_setup();
===================================================================
@@ -288,10 +288,4 @@
print_debug("After configuration:\r\n");
/* dump_pci_devices(); */
-
- /*
- print_debug("\n\n***** RAM TEST *****\r\n");
- ram_check(0, 0xa0000);
- ram_check(0x100000, 0x40000000);
- */
}