| Submitter | Patrick Georgi |
|---|---|
| Date | 2009-08-01 17:10:40 |
| Message ID | <4A747710.8010602@georgi-clan.de> |
| Download | mbox | patch |
| Permalink | /patch/85/ |
| State | Accepted |
| Headers | show |
Comments
I realize this is going to be a little painful, but we have to start
moving forward. We really need cbfs, it's going to help
us move out of the nasty arithmetic and hand sizing we do now.
Stefan had an idea that we should start bumping the version number. I
think this change means we are now coreboot 2.1
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
Hi Patrick, On Sat, 2009-08-01 at 19:10 +0200, Patrick Georgi wrote: > Hi, > > attached patches enable CBFS for all boards and fix various related issues. I'm eager to see it merged in the main v2 tree. Any timeframe? > 20090801-1-model_lx-should-use-generic-copy-and-run > cpu/amd/model_lx uses its own routine for copying coreboot_ram, I tried > to make it use the generic infrastructure, but I can't test it due to > lack of hardware. > > 20090801-2-fix-cpp-scope-of-strings > This patch fixes the generic code for copying and running coreboot_ram > in case certain configuration options are disabled. the strings were > just at the wrong place. > > 20090801-3-only-fix-romstream-stuff-if-romstream-is-possible > Two boards fix up some variables for romstream. This isn't necessary (or > possible) when CBFS is active, as there is no romstream. It would be > nicer to have them depend on CONFIG_ROM_PAYLOAD, but there isn't any > invariant that forces that to be inactive if CBFS is active, and this > patch is supposed to be small, esp. as the stream loaders are on the way > out. > > 20090801-4-enable-cbfs-for-all-boards > Big patch touching nearly every board, to enable CBFS. Everything built, > but that's all testing I could do, as the boards I have available > already have CBFS activated. I'll test it with Asus M2V-MX-SE and with qemu and LAB payloads. Thanks, Cristi.
These patches are in r4494. They have no impact except fixing compile errors in certain corner cases, so they're in. 20090801-2-fix-cpp-scope-of-strings This patch fixes the generic code for copying and running coreboot_ram in case certain configuration options are disabled. the strings were just at the wrong place. 20090801-3-only-fix-romstream-stuff-if-romstream-is-possible Two boards fix up some variables for romstream. This isn't necessary (or possible) when CBFS is active, as there is no romstream. It would be nicer to have them depend on CONFIG_ROM_PAYLOAD, but there isn't any invariant that forces that to be inactive if CBFS is active, and this patch is supposed to be small, esp. as the stream loaders are on the way out. These patches are still in my queue. The first might break cpu/amd/model_lx boards, and I didn't get any feedback on it, the other one converts the entire tree to CBFS - so it has a big impact. Thus I'll have them wait in my queue for a bit until kconfig is in, so people can work with/on kconfig without having to care about issues that might come from these patches. > 20090801-1-model_lx-should-use-generic-copy-and-run > cpu/amd/model_lx uses its own routine for copying coreboot_ram, I tried > to make it use the generic infrastructure, but I can't test it due to > lack of hardware. > > > 20090801-4-enable-cbfs-for-all-boards > Big patch touching nearly every board, to enable CBFS. Everything built, > but that's all testing I could do, as the boards I have available > already have CBFS activated Patrick
Patch
Index: src/cpu/amd/model_lx/cache_as_ram.inc =================================================================== --- src/cpu/amd/model_lx/cache_as_ram.inc (revision 4472) +++ src/cpu/amd/model_lx/cache_as_ram.inc (working copy) @@ -217,107 +217,25 @@ * the location it is compiled to run at. * Normally this is copying from FLASH ROM to RAM. */ -#if !CONFIG_COMPRESS + movl %ebp, %esi + /* FIXME: look for a proper place for the stack */ + movl $0x4000000, %esp + movl %esp, %ebp + pushl %esi +#if CONFIG_CBFS == 1 + pushl $str_coreboot_ram_name + call cbfs_and_run_core +#else movl $_liseg, %esi movl $_iseg, %edi movl $_eiseg, %ecx subl %edi, %ecx - movb %cl, %al - shrl $2, %ecx - andb $3, %al - rep movsl - movb %al, %cl - rep movsb -#else - leal 4+_liseg, %esi - leal _iseg, %edi - movl %ebp, %esp /* preserve %ebp */ - movl $-1, %ebp /* last_m_off = -1 */ - jmp dcl1_n2b - -/* ------------- DECOMPRESSION ------------- - - Input: - %esi - source - %edi - dest - %ebp - -1 - cld - - Output: - %eax - 0 - %ecx - 0 -*/ - -.macro getbit bits -.if \bits == 1 - addl %ebx, %ebx - jnz 1f -.endif - movl (%esi), %ebx - subl $-4, %esi /* sets carry flag */ - adcl %ebx, %ebx -1: -.endm - -decompr_literals_n2b: - movsb - -decompr_loop_n2b: - addl %ebx, %ebx - jnz dcl2_n2b -dcl1_n2b: - getbit 32 -dcl2_n2b: - jc decompr_literals_n2b - xorl %eax, %eax - incl %eax /* m_off = 1 */ -loop1_n2b: - getbit 1 - adcl %eax, %eax /* m_off = m_off*2 + getbit() */ - getbit 1 - jnc loop1_n2b /* while(!getbit()) */ - xorl %ecx, %ecx - subl $3, %eax - jb decompr_ebpeax_n2b /* if (m_off == 2) goto decompr_ebpeax_n2b ? */ - shll $8, %eax - movb (%esi), %al /* m_off = (m_off - 3)*256 + src[ilen++] */ - incl %esi - xorl $-1, %eax - jz decompr_end_n2b /* if (m_off == 0xffffffff) goto decomp_end_n2b */ - movl %eax, %ebp /* last_m_off = m_off ?*/ -decompr_ebpeax_n2b: - getbit 1 - adcl %ecx, %ecx /* m_len = getbit() */ - getbit 1 - adcl %ecx, %ecx /* m_len = m_len*2 + getbit()) */ - jnz decompr_got_mlen_n2b /* if (m_len == 0) goto decompr_got_mlen_n2b */ - incl %ecx /* m_len++ */ -loop2_n2b: - getbit 1 - adcl %ecx, %ecx /* m_len = m_len*2 + getbit() */ - getbit 1 - jnc loop2_n2b /* while(!getbit()) */ - incl %ecx - incl %ecx /* m_len += 2 */ -decompr_got_mlen_n2b: - cmpl $-0xd00, %ebp - adcl $1, %ecx /* m_len = m_len + 1 + (last_m_off > 0xd00) */ - movl %esi, %edx - leal (%edi,%ebp), %esi /* m_pos = dst + olen + -m_off */ - rep - movsb /* dst[olen++] = *m_pos++ while(m_len > 0) */ - movl %edx, %esi - jmp decompr_loop_n2b -decompr_end_n2b: - intel_chip_post_macro(0x12) /* post 12 */ - - movl %esp, %ebp + pushl %ecx + pushl %edi + pushl %esi + call copy_and_run_core #endif - CONSOLE_DEBUG_TX_STRING($str_pre_main) - leal _iseg, %edi - jmp *%edi - .Lhlt: intel_chip_post_macro(0xee) /* post fail ee */ hlt @@ -377,3 +295,10 @@ .previous #endif /* ASM_CONSOLE_LOGLEVEL > BIOS_DEBUG */ +#if CONFIG_CBFS == 1 +# if CONFIG_USE_FALLBACK_IMAGE == 1 +str_coreboot_ram_name: .string "fallback/coreboot_ram" +# else +str_coreboot_ram_name: .string "normal/coreboot_ram" +# endif +#endif
Hi, attached patches enable CBFS for all boards and fix various related issues. 20090801-1-model_lx-should-use-generic-copy-and-run cpu/amd/model_lx uses its own routine for copying coreboot_ram, I tried to make it use the generic infrastructure, but I can't test it due to lack of hardware. 20090801-2-fix-cpp-scope-of-strings This patch fixes the generic code for copying and running coreboot_ram in case certain configuration options are disabled. the strings were just at the wrong place. 20090801-3-only-fix-romstream-stuff-if-romstream-is-possible Two boards fix up some variables for romstream. This isn't necessary (or possible) when CBFS is active, as there is no romstream. It would be nicer to have them depend on CONFIG_ROM_PAYLOAD, but there isn't any invariant that forces that to be inactive if CBFS is active, and this patch is supposed to be small, esp. as the stream loaders are on the way out. 20090801-4-enable-cbfs-for-all-boards Big patch touching nearly every board, to enable CBFS. Everything built, but that's all testing I could do, as the boards I have available already have CBFS activated. Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Regards, Patrick Index: src/arch/i386/init/crt0.S.lb =================================================================== --- src/arch/i386/init/crt0.S.lb (revision 4472) +++ src/arch/i386/init/crt0.S.lb (working copy) @@ -70,6 +70,7 @@ * Normally this is copying from FLASH ROM to RAM. */ movl %ebp, %esi + /* FIXME: look for a proper place for the stack */ movl $0x4000000, %esp movl %esp, %ebp pushl %esi @@ -142,6 +143,11 @@ #else str_copying_to_ram: .string "Copying coreboot to RAM.\r\n" #endif +str_pre_main: .string "Jumping to coreboot.\r\n" +.previous + +#endif /* ASM_CONSOLE_LOGLEVEL > BIOS_DEBUG */ + #if CONFIG_CBFS == 1 # if CONFIG_USE_FALLBACK_IMAGE == 1 str_coreboot_ram_name: .string "fallback/coreboot_ram" @@ -149,9 +155,5 @@ str_coreboot_ram_name: .string "normal/coreboot_ram" # endif #endif -str_pre_main: .string "Jumping to coreboot.\r\n" -.previous -#endif /* ASM_CONSOLE_LOGLEVEL > BIOS_DEBUG */ - #endif /* CONFIG_USE_DCACHE_RAM */ Index: src/mainboard/digitallogic/msm586seg/mainboard.c =================================================================== --- src/mainboard/digitallogic/msm586seg/mainboard.c (revision 4472) +++ src/mainboard/digitallogic/msm586seg/mainboard.c (working copy) @@ -35,7 +35,9 @@ - set ADDDECTL (now done in raminit.c in cpu/amd/sc520 */ static void enable_dev(struct device *dev) { +#if !CONFIG_CBFS extern unsigned char *rom_start, *rom_end; +#endif volatile struct mmcrpic *pic = MMCRPIC; volatile struct mmcr *mmcr = MMCRDEFAULT; @@ -134,10 +136,12 @@ /* follow fuctory here */ mmcr->dmacontrol.extchanmapa = 0x3210; +#if !CONFIG_CBFS /* hack for IDIOTIC need to fix rom_start */ printk_err("Patching rom_start due to sc520 limits\n"); rom_start = 0x2000000 + 0x40000; rom_end = rom_start + CONFIG_PAYLOAD_SIZE - 1; +#endif } Index: src/mainboard/technologic/ts5300/mainboard.c =================================================================== --- src/mainboard/technologic/ts5300/mainboard.c (revision 4472) +++ src/mainboard/technologic/ts5300/mainboard.c (working copy) @@ -35,7 +35,9 @@ - set ADDDECTL (now done in raminit.c in cpu/amd/sc520 */ static void enable_dev(struct device *dev) { +#if !CONFIG_CBFS extern unsigned char *rom_start, *rom_end; +#endif volatile struct mmcrpic *pic = MMCRPIC; volatile struct mmcr *mmcr = MMCRDEFAULT; @@ -139,10 +141,12 @@ mmcr->dmacontrol.extchanmapa = 0xf210; mmcr->dmacontrol.extchanmapb = 0xffff; +#if !CONFIG_CBFS /* hack for IDIOTIC need to fix rom_start */ printk_err("Patching rom_start due to sc520 limits\n"); rom_start = 0x09400000 + 0xe0000; rom_end = rom_start + CONFIG_PAYLOAD_SIZE - 1; +#endif printk_err("TS5300 EXIT %s\n", __func__); Index: src/mainboard/a-trend/atc-6220/Options.lb =================================================================== --- src/mainboard/a-trend/atc-6220/Options.lb (revision 4472) +++ src/mainboard/a-trend/atc-6220/Options.lb (working copy) @@ -77,7 +77,7 @@ default CONFIG_MAINBOARD_VENDOR = "N/A" # Override this in targets/*/Config.lb. default CONFIG_MAINBOARD_PART_NUMBER = "N/A" # Override this in targets/*/Config.lb. default CONFIG_ROM_IMAGE_SIZE = 64 * 1024 -default CONFIG_FALLBACK_SIZE = 128 * 1024 +default CONFIG_FALLBACK_SIZE = CONFIG_ROM_IMAGE_SIZE default CONFIG_STACK_SIZE = 8 * 1024 default CONFIG_HEAP_SIZE = 16 * 1024 default CONFIG_HAVE_OPTION_TABLE = 0 @@ -101,5 +101,5 @@ # CBFS # # -default CONFIG_CBFS=0 +default CONFIG_CBFS=1 end Index: src/mainboard/a-trend/atc-6240/Options.lb =================================================================== --- src/mainboard/a-trend/atc-6240/Options.lb (revision 4472) +++ src/mainboard/a-trend/atc-6240/Options.lb (working copy) @@ -77,7 +77,7 @@ default CONFIG_MAINBOARD_VENDOR = "N/A" # Override this in targets/*/Config.lb. default CONFIG_MAINBOARD_PART_NUMBER = "N/A" # Override this in targets/*/Config.lb. default CONFIG_ROM_IMAGE_SIZE = 64 * 1024 -default CONFIG_FALLBACK_SIZE = 128 * 1024 +default CONFIG_FALLBACK_SIZE = CONFIG_ROM_IMAGE_SIZE default CONFIG_STACK_SIZE = 8 * 1024 default CONFIG_HEAP_SIZE = 16 * 1024 default CONFIG_HAVE_OPTION_TABLE = 0 @@ -101,5 +101,5 @@ # CBFS # # -default CONFIG_CBFS=0 +default CONFIG_CBFS=1 end Index: src/mainboard/abit/be6-ii_v2_0/Options.lb =================================================================== --- src/mainboard/abit/be6-ii_v2_0/Options.lb (revision 4472) +++ src/mainboard/abit/be6-ii_v2_0/Options.lb (working copy) @@ -78,7 +78,7 @@ default CONFIG_MAINBOARD_VENDOR = "N/A" # Override this in targets/*/Config.lb. default CONFIG_MAINBOARD_PART_NUMBER = "N/A" # Override this in targets/*/Config.lb. default CONFIG_ROM_IMAGE_SIZE = 64 * 1024 -default CONFIG_FALLBACK_SIZE = 128 * 1024 +default CONFIG_FALLBACK_SIZE = CONFIG_ROM_IMAGE_SIZE default CONFIG_STACK_SIZE = 8 * 1024 default CONFIG_HEAP_SIZE = 16 * 1024 default CONFIG_HAVE_OPTION_TABLE = 0 @@ -102,5 +102,5 @@ # CBFS # # -default CONFIG_CBFS=0 +default CONFIG_CBFS=1 end Index: src/mainboard/advantech/pcm-5820/Options.lb =================================================================== --- src/mainboard/advantech/pcm-5820/Options.lb (revision 4472) +++ src/mainboard/advantech/pcm-5820/Options.lb (working copy) @@ -87,7 +87,7 @@ default CONFIG_MAINBOARD_VENDOR = "N/A" # Override this in targets/*/Config.lb. default CONFIG_MAINBOARD_PART_NUMBER = "N/A" # Override this in targets/*/Config.lb. default CONFIG_ROM_IMAGE_SIZE = 64 * 1024 -default CONFIG_FALLBACK_SIZE = 128 * 1024 +default CONFIG_FALLBACK_SIZE = CONFIG_ROM_IMAGE_SIZE default CONFIG_STACK_SIZE = 8 * 1024 default CONFIG_HEAP_SIZE = 16 * 1024 default CONFIG_USE_OPTION_TABLE = 0 @@ -107,5 +107,5 @@ # CBFS # # -default CONFIG_CBFS=0 +default CONFIG_CBFS=1 end Index: src/mainboard/amd/db800/Options.lb =================================================================== --- src/mainboard/amd/db800/Options.lb (revision 4472) +++ src/mainboard/amd/db800/Options.lb (working copy) @@ -101,7 +101,7 @@ ## CONFIG_ROM_IMAGE_SIZE is the amount of space to allow coreboot to occupy. default CONFIG_ROM_IMAGE_SIZE = 65536 -default CONFIG_FALLBACK_SIZE = 131072 +default CONFIG_FALLBACK_SIZE = CONFIG_ROM_IMAGE_SIZE ## ## enable CACHE_AS_RAM specifics @@ -185,5 +185,5 @@ # CBFS # # -default CONFIG_CBFS=0 +default CONFIG_CBFS=1 end Index: src/mainboard/amd/dbm690t/Options.lb =================================================================== --- src/mainboard/amd/dbm690t/Options.lb (revision 4472) +++ src/mainboard/amd/dbm690t/Options.lb (working copy) @@ -106,9 +106,9 @@ ## ## CONFIG_FALLBACK_SIZE is the amount of the ROM the complete fallback image will use ## -#default CONFIG_FALLBACK_SIZE=131072 +#default CONFIG_FALLBACK_SIZE = CONFIG_ROM_IMAGE_SIZE #256K -default CONFIG_FALLBACK_SIZE=0x40000 +default CONFIG_FALLBACK_SIZE = CONFIG_ROM_IMAGE_SIZE ## ## Build code for the fallback boot @@ -305,5 +305,5 @@ # CBFS # # -default CONFIG_CBFS=0 +default CONFIG_CBFS=1 end Index: src/mainboard/amd/norwich/Options.lb =================================================================== --- src/mainboard/amd/norwich/Options.lb (revision 4472) +++ src/mainboard/amd/norwich/Options.lb (working copy) @@ -101,7 +101,7 @@ ## CONFIG_ROM_IMAGE_SIZE is the amount of space to allow coreboot to occupy. default CONFIG_ROM_IMAGE_SIZE = 65536 -default CONFIG_FALLBACK_SIZE = 131072 +default CONFIG_FALLBACK_SIZE = CONFIG_ROM_IMAGE_SIZE ## ## enable CACHE_AS_RAM specifics @@ -185,5 +185,5 @@ # CBFS # # -default CONFIG_CBFS=0 +default CONFIG_CBFS=1 end Index: src/mainboard/amd/pistachio/Options.lb =================================================================== --- src/mainboard/amd/pistachio/Options.lb (revision 4472) +++ src/mainboard/amd/pistachio/Options.lb (working copy) @@ -106,9 +106,9 @@ ## ## CONFIG_FALLBACK_SIZE is the amount of the ROM the complete fallback image will use ## -#default CONFIG_FALLBACK_SIZE=131072 +#default CONFIG_FALLBACK_SIZE = CONFIG_ROM_IMAGE_SIZE #256K -default CONFIG_FALLBACK_SIZE=0x40000 +default CONFIG_FALLBACK_SIZE = CONFIG_ROM_IMAGE_SIZE ## ## Build code for the fallback boot @@ -305,5 +305,5 @@ # CBFS # # -default CONFIG_CBFS=0 +default CONFIG_CBFS=1 end Index: src/mainboard/amd/rumba/Options.lb =================================================================== --- src/mainboard/amd/rumba/Options.lb (revision 4472) +++ src/mainboard/amd/rumba/Options.lb (working copy) @@ -88,7 +88,7 @@ ## CONFIG_ROM_IMAGE_SIZE is the amount of space to allow coreboot to occupy. default CONFIG_ROM_IMAGE_SIZE = 65536 -default CONFIG_FALLBACK_SIZE = 131072 +default CONFIG_FALLBACK_SIZE = CONFIG_ROM_IMAGE_SIZE ## ## Use a small 8K stack @@ -164,5 +164,5 @@ # CBFS # # -default CONFIG_CBFS=0 +default CONFIG_CBFS=1 end Index: src/mainboard/amd/serengeti_cheetah_fam10/Options.lb =================================================================== --- src/mainboard/amd/serengeti_cheetah_fam10/Options.lb (revision 4472) +++ src/mainboard/amd/serengeti_cheetah_fam10/Options.lb (working copy) @@ -130,11 +130,9 @@ ## #FALLBACK_SIZE_SIZE is the amount of the ROM the complete fallback image will use ## -#default CONFIG_FALLBACK_SIZE=131072 -#default CONFIG_FALLBACK_SIZE=0x40000 #FALLBACK: 1024K - 8K -default CONFIG_FALLBACK_SIZE=0xFE000 +default CONFIG_FALLBACK_SIZE = CONFIG_ROM_IMAGE_SIZE #FAILOVER: 8k default CONFIG_FAILOVER_SIZE=0x02000 @@ -368,5 +366,5 @@ # CBFS # # -default CONFIG_CBFS=0 +default CONFIG_CBFS=1 end Index: src/mainboard/amd/serengeti_cheetah/Options.lb =================================================================== --- src/mainboard/amd/serengeti_cheetah/Options.lb (revision 4472) +++ src/mainboard/amd/serengeti_cheetah/Options.lb (working copy) @@ -105,12 +105,8 @@ ## ## CONFIG_FALLBACK_SIZE is the amount of the ROM the complete fallback image will use ## -#default CONFIG_FALLBACK_SIZE=131072 -#default CONFIG_FALLBACK_SIZE=0x40000 -#FALLBACK: 256K-4K -default CONFIG_FALLBACK_SIZE=0x3f000 -#FAILOVER: 4K +default CONFIG_FALLBACK_SIZE = CONFIG_ROM_IMAGE_SIZE default CONFIG_FAILOVER_SIZE=0x01000 #more 1M for pgtbl @@ -239,7 +235,7 @@ ### ## CONFIG_ROM_IMAGE_SIZE is the amount of space to allow coreboot to occupy. -default CONFIG_ROM_IMAGE_SIZE = 65536 +default CONFIG_ROM_IMAGE_SIZE = 65536 - CONFIG_FAILOVER_SIZE ## ## Use a small 8K stack @@ -333,5 +329,5 @@ # CBFS # # -default CONFIG_CBFS=0 +default CONFIG_CBFS=1 end Index: src/mainboard/arima/hdama/Options.lb =================================================================== --- src/mainboard/arima/hdama/Options.lb (revision 4472) +++ src/mainboard/arima/hdama/Options.lb (working copy) @@ -76,7 +76,7 @@ ## ## CONFIG_FALLBACK_SIZE is the amount of the ROM the complete fallback image will use ## -default CONFIG_FALLBACK_SIZE=0x40000 +default CONFIG_FALLBACK_SIZE = CONFIG_ROM_IMAGE_SIZE ## ## Build code for the fallback boot @@ -246,5 +246,5 @@ # CBFS # # -default CONFIG_CBFS=0 +default CONFIG_CBFS=1 end Index: src/mainboard/artecgroup/dbe61/Options.lb =================================================================== --- src/mainboard/artecgroup/dbe61/Options.lb (revision 4472) +++ src/mainboard/artecgroup/dbe61/Options.lb (working copy) @@ -101,7 +101,7 @@ ## CONFIG_ROM_IMAGE_SIZE is the amount of space to allow coreboot to occupy. default CONFIG_ROM_IMAGE_SIZE = 65536 -default CONFIG_FALLBACK_SIZE = 131072 +default CONFIG_FALLBACK_SIZE = CONFIG_ROM_IMAGE_SIZE ## ## enable CACHE_AS_RAM specifics @@ -185,5 +185,5 @@ # CBFS # # -default CONFIG_CBFS=0 +default CONFIG_CBFS=1 end Index: src/mainboard/asi/mb_5blgp/Options.lb =================================================================== --- src/mainboard/asi/mb_5blgp/Options.lb (revision 4472) +++ src/mainboard/asi/mb_5blgp/Options.lb (working copy) @@ -87,7 +87,7 @@ default CONFIG_MAINBOARD_VENDOR = "N/A" # Override this in targets/*/Config.lb. default CONFIG_MAINBOARD_PART_NUMBER = "N/A" # Override this in targets/*/Config.lb. default CONFIG_ROM_IMAGE_SIZE = 64 * 1024 -default CONFIG_FALLBACK_SIZE = 128 * 1024 +default CONFIG_FALLBACK_SIZE = CONFIG_ROM_IMAGE_SIZE default CONFIG_STACK_SIZE = 8 * 1024 default CONFIG_HEAP_SIZE = 16 * 1024 default CONFIG_USE_OPTION_TABLE = 0 @@ -107,5 +107,5 @@ # CBFS # # -default CONFIG_CBFS=0 +default CONFIG_CBFS=1 end Index: src/mainboard/asi/mb_5blmp/Options.lb =================================================================== --- src/mainboard/asi/mb_5blmp/Options.lb (revision 4472) +++ src/mainboard/asi/mb_5blmp/Options.lb (working copy) @@ -85,7 +85,7 @@ ## CONFIG_ROM_IMAGE_SIZE is the amount of space to allow coreboot to occupy. default CONFIG_ROM_IMAGE_SIZE = 64 * 1024 -default CONFIG_FALLBACK_SIZE = 128 * 1024 +default CONFIG_FALLBACK_SIZE = CONFIG_ROM_IMAGE_SIZE ## ## Use a small 8K stack @@ -166,5 +166,5 @@ # CBFS # # -default CONFIG_CBFS=0 +default CONFIG_CBFS=1 end Index: src/mainboard/asus/a8n_e/Options.lb =================================================================== --- src/mainboard/asus/a8n_e/Options.lb (revision 4472) +++ src/mainboard/asus/a8n_e/Options.lb (working copy) @@ -100,8 +100,8 @@ uses CONFIG_USE_PRINTK_IN_CAR default CONFIG_ROM_SIZE = 512 * 1024 -default CONFIG_ROM_IMAGE_SIZE = 64 * 1024 -default CONFIG_FALLBACK_SIZE = 252 * 1024 +default CONFIG_ROM_IMAGE_SIZE = 64 * 1024 - CONFIG_FAILOVER_SIZE +default CONFIG_FALLBACK_SIZE = CONFIG_ROM_IMAGE_SIZE default CONFIG_FAILOVER_SIZE = 4 * 1024 default CONFIG_HAVE_FALLBACK_BOOT = 1 default CONFIG_HAVE_FAILOVER_BOOT = 1 @@ -171,5 +171,5 @@ # CBFS # # -default CONFIG_CBFS=0 +default CONFIG_CBFS=1 end Index: src/mainboard/asus/a8v-e_se/Options.lb =================================================================== --- src/mainboard/asus/a8v-e_se/Options.lb (revision 4472) +++ src/mainboard/asus/a8v-e_se/Options.lb (working copy) @@ -95,7 +95,7 @@ uses CONFIG_USE_PRINTK_IN_CAR default CONFIG_ROM_SIZE = 512 * 1024 -default CONFIG_FALLBACK_SIZE = 256 * 1024 +default CONFIG_FALLBACK_SIZE = CONFIG_ROM_IMAGE_SIZE default CONFIG_HAVE_FALLBACK_BOOT = 1 default CONFIG_HAVE_HARD_RESET = 0 default CONFIG_HAVE_PIRQ_TABLE = 0 @@ -171,5 +171,5 @@ # CBFS # # -default CONFIG_CBFS=0 +default CONFIG_CBFS=1 end Index: src/mainboard/asus/m2v-mx_se/Options.lb =================================================================== --- src/mainboard/asus/m2v-mx_se/Options.lb (revision 4472) +++ src/mainboard/asus/m2v-mx_se/Options.lb (working copy) @@ -173,9 +173,12 @@ default CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9 default CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9 default CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL = "MAINBOARD_POWER_ON" + +default CONFIG_FALLBACK_SIZE = CONFIG_ROM_IMAGE_SIZE +default CONFIG_ROM_IMAGE_SIZE = 64 * 1024 # # CBFS # # -default CONFIG_CBFS=0 +default CONFIG_CBFS=1 end Index: src/mainboard/asus/mew-am/Options.lb =================================================================== --- src/mainboard/asus/mew-am/Options.lb (revision 4472) +++ src/mainboard/asus/mew-am/Options.lb (working copy) @@ -77,7 +77,7 @@ default CONFIG_MAINBOARD_VENDOR = "N/A" # Override this in targets/*/Config.lb. default CONFIG_MAINBOARD_PART_NUMBER = "N/A" # Override this in targets/*/Config.lb. default CONFIG_ROM_IMAGE_SIZE = 64 * 1024 -default CONFIG_FALLBACK_SIZE = 128 * 1024 +default CONFIG_FALLBACK_SIZE = CONFIG_ROM_IMAGE_SIZE default CONFIG_STACK_SIZE = 8 * 1024 default CONFIG_HEAP_SIZE = 16 * 1024 default CONFIG_HAVE_OPTION_TABLE = 0 @@ -101,5 +101,5 @@ # CBFS # # -default CONFIG_CBFS=0 +default CONFIG_CBFS=1 end Index: src/mainboard/asus/mew-vm/Options.lb =================================================================== --- src/mainboard/asus/mew-vm/Options.lb (revision 4472) +++ src/mainboard/asus/mew-vm/Options.lb (working copy) @@ -85,7 +85,7 @@ ## CONFIG_ROM_IMAGE_SIZE is the amount of space to allow coreboot to occupy. default CONFIG_ROM_IMAGE_SIZE = 65536 -default CONFIG_FALLBACK_SIZE = 131072 +default CONFIG_FALLBACK_SIZE = CONFIG_ROM_IMAGE_SIZE ## ## Use a small 8K stack @@ -162,5 +162,5 @@ # CBFS # # -default CONFIG_CBFS=0 +default CONFIG_CBFS=1 end Index: src/mainboard/asus/p2b-d/Options.lb =================================================================== --- src/mainboard/asus/p2b-d/Options.lb (revision 4472) +++ src/mainboard/asus/p2b-d/Options.lb (working copy) @@ -81,7 +81,7 @@ default CONFIG_MAINBOARD_VENDOR = "N/A" # Override this in targets/*/Config.lb. default CONFIG_MAINBOARD_PART_NUMBER = "N/A" # Override this in targets/*/Config.lb. default CONFIG_ROM_IMAGE_SIZE = 64 * 1024 -default CONFIG_FALLBACK_SIZE = 128 * 1024 +default CONFIG_FALLBACK_SIZE = CONFIG_ROM_IMAGE_SIZE default CONFIG_STACK_SIZE = 8 * 1024 default CONFIG_HEAP_SIZE = 16 * 1024 default CONFIG_HAVE_OPTION_TABLE = 0 @@ -103,5 +103,5 @@ default CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9 default CONFIG_CONSOLE_VGA = 1 default CONFIG_PCI_ROM_RUN = 1 -default CONFIG_CBFS = 0 +default CONFIG_CBFS=1 end Index: src/mainboard/asus/p2b-ds/Options.lb =================================================================== --- src/mainboard/asus/p2b-ds/Options.lb (revision 4472) +++ src/mainboard/asus/p2b-ds/Options.lb (working copy) @@ -81,7 +81,7 @@ default CONFIG_MAINBOARD_VENDOR = "N/A" # Override this in targets/*/Config.lb. default CONFIG_MAINBOARD_PART_NUMBER = "N/A" # Override this in targets/*/Config.lb. default CONFIG_ROM_IMAGE_SIZE = 64 * 1024 -default CONFIG_FALLBACK_SIZE = 128 * 1024 +default CONFIG_FALLBACK_SIZE = CONFIG_ROM_IMAGE_SIZE default CONFIG_STACK_SIZE = 8 * 1024 default CONFIG_HEAP_SIZE = 16 * 1024 default CONFIG_HAVE_OPTION_TABLE = 0 @@ -108,5 +108,5 @@ # CBFS # # -default CONFIG_CBFS=0 +default CONFIG_CBFS=1 end Index: src/mainboard/asus/p2b-f/Options.lb =================================================================== --- src/mainboard/asus/p2b-f/Options.lb (revision 4472) +++ src/mainboard/asus/p2b-f/Options.lb (working copy) @@ -77,7 +77,7 @@ default CONFIG_MAINBOARD_VENDOR = "N/A" # Override this in targets/*/Config.lb. default CONFIG_MAINBOARD_PART_NUMBER = "N/A" # Override this in targets/*/Config.lb. default CONFIG_ROM_IMAGE_SIZE = 64 * 1024 -default CONFIG_FALLBACK_SIZE = 128 * 1024 +default CONFIG_FALLBACK_SIZE = CONFIG_ROM_IMAGE_SIZE default CONFIG_STACK_SIZE = 8 * 1024 default CONFIG_HEAP_SIZE = 16 * 1024 default CONFIG_HAVE_OPTION_TABLE = 0 @@ -101,5 +101,5 @@ # CBFS # # -default CONFIG_CBFS=0 +default CONFIG_CBFS=1 end Index: src/mainboard/asus/p2b/Options.lb =================================================================== --- src/mainboard/asus/p2b/Options.lb (revision 4472) +++ src/mainboard/asus/p2b/Options.lb (working copy) @@ -78,7 +78,7 @@ default CONFIG_MAINBOARD_VENDOR = "N/A" # Override this in targets/*/Config.lb. default CONFIG_MAINBOARD_PART_NUMBER = "N/A" # Override this in targets/*/Config.lb. default CONFIG_ROM_IMAGE_SIZE = 64 * 1024 -default CONFIG_FALLBACK_SIZE = 128 * 1024 +default CONFIG_FALLBACK_SIZE = CONFIG_ROM_IMAGE_SIZE default CONFIG_STACK_SIZE = 8 * 1024 default CONFIG_HEAP_SIZE = 16 * 1024 default CONFIG_HAVE_OPTION_TABLE = 0 @@ -102,5 +102,5 @@ # CBFS # # -default CONFIG_CBFS=0 +default CONFIG_CBFS=1 end Index: src/mainboard/asus/p3b-f/Options.lb =================================================================== --- src/mainboard/asus/p3b-f/Options.lb (revision 4472) +++ src/mainboard/asus/p3b-f/Options.lb (working copy) @@ -77,7 +77,7 @@ default CONFIG_MAINBOARD_VENDOR = "N/A" # Override this in targets/*/Config.lb. default CONFIG_MAINBOARD_PART_NUMBER = "N/A" # Override this in targets/*/Config.lb. default CONFIG_ROM_IMAGE_SIZE = 64 * 1024 -default CONFIG_FALLBACK_SIZE = 128 * 1024 +default CONFIG_FALLBACK_SIZE = CONFIG_ROM_IMAGE_SIZE default CONFIG_STACK_SIZE = 8 * 1024 default CONFIG_HEAP_SIZE = 16 * 1024 default CONFIG_HAVE_OPTION_TABLE = 0 @@ -101,5 +101,5 @@ # CBFS # # -default CONFIG_CBFS=0 +default CONFIG_CBFS=1 end Index: src/mainboard/axus/tc320/Options.lb =================================================================== --- src/mainboard/axus/tc320/Options.lb (revision 4472) +++ src/mainboard/axus/tc320/Options.lb (working copy) @@ -87,7 +87,7 @@ default CONFIG_PIRQ_ROUTE = 1 default CONFIG_HAVE_OPTION_TABLE = 0 default CONFIG_ROM_IMAGE_SIZE = 64 * 1024 -default CONFIG_FALLBACK_SIZE = 128 * 1024 +default CONFIG_FALLBACK_SIZE = CONFIG_ROM_IMAGE_SIZE default CONFIG_STACK_SIZE = 8 * 1024 default CONFIG_HEAP_SIZE = 16 * 1024 default CONFIG_USE_OPTION_TABLE = 0 @@ -107,5 +107,5 @@ # CBFS # # -default CONFIG_CBFS=0 +default CONFIG_CBFS=1 end Index: src/mainboard/azza/pt-6ibd/Options.lb =================================================================== --- src/mainboard/azza/pt-6ibd/Options.lb (revision 4472) +++ src/mainboard/azza/pt-6ibd/Options.lb (working copy) @@ -77,7 +77,7 @@ default CONFIG_MAINBOARD_VENDOR = "N/A" # Override this in targets/*/Config.lb. default CONFIG_MAINBOARD_PART_NUMBER = "N/A" # Override this in targets/*/Config.lb. default CONFIG_ROM_IMAGE_SIZE = 64 * 1024 -default CONFIG_FALLBACK_SIZE = 128 * 1024 +default CONFIG_FALLBACK_SIZE = CONFIG_ROM_IMAGE_SIZE default CONFIG_STACK_SIZE = 8 * 1024 default CONFIG_HEAP_SIZE = 16 * 1024 default CONFIG_HAVE_OPTION_TABLE = 0 @@ -101,5 +101,5 @@ # CBFS # # -default CONFIG_CBFS=0 +default CONFIG_CBFS=1 end Index: src/mainboard/bcom/winnet100/Options.lb =================================================================== --- src/mainboard/bcom/winnet100/Options.lb (revision 4472) +++ src/mainboard/bcom/winnet100/Options.lb (working copy) @@ -87,7 +87,7 @@ default CONFIG_PIRQ_ROUTE = 1 default CONFIG_HAVE_OPTION_TABLE = 0 default CONFIG_ROM_IMAGE_SIZE = 64 * 1024 -default CONFIG_FALLBACK_SIZE = 128 * 1024 +default CONFIG_FALLBACK_SIZE = CONFIG_ROM_IMAGE_SIZE default CONFIG_STACK_SIZE = 8 * 1024 default CONFIG_HEAP_SIZE = 16 * 1024 default CONFIG_USE_OPTION_TABLE = 0 @@ -107,5 +107,5 @@ # CBFS # # -default CONFIG_CBFS=0 +default CONFIG_CBFS=1 end Index: src/mainboard/bcom/winnetp680/Options.lb =================================================================== --- src/mainboard/bcom/winnetp680/Options.lb (revision 4472) +++ src/mainboard/bcom/winnetp680/Options.lb (working copy) @@ -84,7 +84,7 @@ default CONFIG_HAVE_ACPI_TABLES = 0 default CONFIG_HAVE_OPTION_TABLE = 1 default CONFIG_ROM_IMAGE_SIZE = 64 * 1024 -default CONFIG_FALLBACK_SIZE = CONFIG_ROM_SIZE +default CONFIG_FALLBACK_SIZE = CONFIG_ROM_IMAGE_SIZE default CONFIG_USE_FALLBACK_IMAGE = 1 default CONFIG_STACK_SIZE = 8 * 1024 default CONFIG_HEAP_SIZE = 16 * 1024 @@ -108,5 +108,5 @@ # CBFS # # -default CONFIG_CBFS=0 +default CONFIG_CBFS=1 end Index: src/mainboard/biostar/m6tba/Options.lb =================================================================== --- src/mainboard/biostar/m6tba/Options.lb (revision 4472) +++ src/mainboard/biostar/m6tba/Options.lb (working copy) @@ -77,7 +77,7 @@ default CONFIG_MAINBOARD_VENDOR = "N/A" # Override this in targets/*/Config.lb. default CONFIG_MAINBOARD_PART_NUMBER = "N/A" # Override this in targets/*/Config.lb. default CONFIG_ROM_IMAGE_SIZE = 64 * 1024 -default CONFIG_FALLBACK_SIZE = 128 * 1024 +default CONFIG_FALLBACK_SIZE = CONFIG_ROM_IMAGE_SIZE default CONFIG_STACK_SIZE = 8 * 1024 default CONFIG_HEAP_SIZE = 16 * 1024 default CONFIG_HAVE_OPTION_TABLE = 0 @@ -101,5 +101,5 @@ # CBFS # # -default CONFIG_CBFS=0 +default CONFIG_CBFS=1 end Index: src/mainboard/broadcom/blast/Options.lb =================================================================== --- src/mainboard/broadcom/blast/Options.lb (revision 4472) +++ src/mainboard/broadcom/blast/Options.lb (working copy) @@ -81,9 +81,7 @@ ## ## CONFIG_FALLBACK_SIZE is the amount of the ROM the complete fallback image will use ## -#default CONFIG_FALLBACK_SIZE=131072 -#256K -default CONFIG_FALLBACK_SIZE=0x40000 +default CONFIG_FALLBACK_SIZE = CONFIG_ROM_IMAGE_SIZE ## ## Build code for the fallback boot @@ -266,5 +264,5 @@ # CBFS # # -default CONFIG_CBFS=0 +default CONFIG_CBFS=1 end Index: src/mainboard/compaq/deskpro_en_sff_p600/Options.lb =================================================================== --- src/mainboard/compaq/deskpro_en_sff_p600/Options.lb (revision 4472) +++ src/mainboard/compaq/deskpro_en_sff_p600/Options.lb (working copy) @@ -77,7 +77,7 @@ default CONFIG_MAINBOARD_VENDOR = "N/A" # Override this in targets/*/Config.lb. default CONFIG_MAINBOARD_PART_NUMBER = "N/A" # Override this in targets/*/Config.lb. default CONFIG_ROM_IMAGE_SIZE = 64 * 1024 -default CONFIG_FALLBACK_SIZE = 128 * 1024 +default CONFIG_FALLBACK_SIZE = CONFIG_ROM_IMAGE_SIZE default CONFIG_STACK_SIZE = 8 * 1024 default CONFIG_HEAP_SIZE = 16 * 1024 default CONFIG_HAVE_OPTION_TABLE = 0 @@ -101,5 +101,5 @@ # CBFS # # -default CONFIG_CBFS=0 +default CONFIG_CBFS=1 end Index: src/mainboard/dell/s1850/Options.lb =================================================================== --- src/mainboard/dell/s1850/Options.lb (revision 4472) +++ src/mainboard/dell/s1850/Options.lb (working copy) @@ -130,7 +130,7 @@ ### ## CONFIG_ROM_IMAGE_SIZE is the amount of space to allow coreboot to occupy. -default CONFIG_ROM_IMAGE_SIZE = 65536 +default CONFIG_ROM_IMAGE_SIZE = 64 * 1024 ## ## Use a small 8K stack @@ -147,7 +147,7 @@ ### Compute the location and size of where this firmware image ### (coreboot plus bootloader) will live in the boot rom chip. ### -default CONFIG_FALLBACK_SIZE=131072 +default CONFIG_FALLBACK_SIZE = CONFIG_ROM_IMAGE_SIZE ## ## Coreboot C code runs at this location in RAM @@ -232,5 +232,5 @@ # CBFS # # -default CONFIG_CBFS=0 +default CONFIG_CBFS=1 end Index: src/mainboard/digitallogic/adl855pc/Options.lb =================================================================== --- src/mainboard/digitallogic/adl855pc/Options.lb (revision 4472) +++ src/mainboard/digitallogic/adl855pc/Options.lb (working copy) @@ -85,7 +85,7 @@ ## CONFIG_ROM_IMAGE_SIZE is the amount of space to allow coreboot to occupy. default CONFIG_ROM_IMAGE_SIZE = 65536 -default CONFIG_FALLBACK_SIZE = 131072 +default CONFIG_FALLBACK_SIZE = CONFIG_ROM_IMAGE_SIZE ## ## Use a small 8K stack @@ -119,5 +119,5 @@ # CBFS # # -default CONFIG_CBFS=0 +default CONFIG_CBFS=1 end Index: src/mainboard/digitallogic/msm586seg/Options.lb =================================================================== --- src/mainboard/digitallogic/msm586seg/Options.lb (revision 4472) +++ src/mainboard/digitallogic/msm586seg/Options.lb (working copy) @@ -93,7 +93,7 @@ ## CONFIG_ROM_IMAGE_SIZE is the amount of space to allow coreboot to occupy. default CONFIG_ROM_IMAGE_SIZE = 65536 -default CONFIG_FALLBACK_SIZE = 131072 +default CONFIG_FALLBACK_SIZE = CONFIG_ROM_IMAGE_SIZE ## ## Use a small 8K stack @@ -127,5 +127,5 @@ # CBFS # # -default CONFIG_CBFS=0 +default CONFIG_CBFS=1 end Index: src/mainboard/digitallogic/msm800sev/Options.lb =================================================================== --- src/mainboard/digitallogic/msm800sev/Options.lb (revision 4472) +++ src/mainboard/digitallogic/msm800sev/Options.lb (working copy) @@ -101,7 +101,7 @@ ## CONFIG_ROM_IMAGE_SIZE is the amount of space to allow coreboot to occupy. default CONFIG_ROM_IMAGE_SIZE = 65536 -default CONFIG_FALLBACK_SIZE = 131072 +default CONFIG_FALLBACK_SIZE = CONFIG_ROM_IMAGE_SIZE ## ## enable CACHE_AS_RAM specifics @@ -185,5 +185,5 @@ # CBFS # # -default CONFIG_CBFS=0 +default CONFIG_CBFS=1 end Index: src/mainboard/eaglelion/5bcm/Options.lb =================================================================== --- src/mainboard/eaglelion/5bcm/Options.lb (revision 4472) +++ src/mainboard/eaglelion/5bcm/Options.lb (working copy) @@ -91,7 +91,7 @@ ## CONFIG_ROM_IMAGE_SIZE is the amount of space to allow coreboot to occupy. default CONFIG_ROM_IMAGE_SIZE = 65536 -default CONFIG_FALLBACK_SIZE = 131072 +default CONFIG_FALLBACK_SIZE = CONFIG_ROM_IMAGE_SIZE ## ## Use a small 8K stack @@ -169,5 +169,5 @@ # CBFS # # -default CONFIG_CBFS=0 +default CONFIG_CBFS=1 end Index: src/mainboard/embeddedplanet/ep405pc/Options.lb =================================================================== --- src/mainboard/embeddedplanet/ep405pc/Options.lb (revision 4472) +++ src/mainboard/embeddedplanet/ep405pc/Options.lb (working copy) @@ -148,5 +148,5 @@ # CBFS # # -default CONFIG_CBFS=0 +default CONFIG_CBFS=1 end Index: src/mainboard/gigabyte/ga_2761gxdk/Options.lb =================================================================== --- src/mainboard/gigabyte/ga_2761gxdk/Options.lb (revision 4472) +++ src/mainboard/gigabyte/ga_2761gxdk/Options.lb (working copy) @@ -131,11 +131,9 @@ ## ## CONFIG_FALLBACK_SIZE is the amount of the ROM the complete fallback image will use ## -#default CONFIG_FALLBACK_SIZE=131072 -#default CONFIG_FALLBACK_SIZE=0x40000 #FALLBACK: 256K-4K -default CONFIG_FALLBACK_SIZE=0x3f000 +default CONFIG_FALLBACK_SIZE = CONFIG_ROM_IMAGE_SIZE #FAILOVER: 4K default CONFIG_FAILOVER_SIZE=0x01000 @@ -261,7 +259,7 @@ ### ## CONFIG_ROM_IMAGE_SIZE is the amount of space to allow coreboot to occupy. -default CONFIG_ROM_IMAGE_SIZE = 65536 +default CONFIG_ROM_IMAGE_SIZE = 65536 - CONFIG_FAILOVER_SIZE ## ## Use a small 8K stack @@ -357,5 +355,5 @@ # CBFS # # -default CONFIG_CBFS=0 +default CONFIG_CBFS=1 end Index: src/mainboard/gigabyte/ga-6bxc/Options.lb =================================================================== --- src/mainboard/gigabyte/ga-6bxc/Options.lb (revision 4472) +++ src/mainboard/gigabyte/ga-6bxc/Options.lb (working copy) @@ -77,7 +77,7 @@ default CONFIG_MAINBOARD_VENDOR = "N/A" # Override this in targets/*/Config.lb. default CONFIG_MAINBOARD_PART_NUMBER = "N/A" # Override this in targets/*/Config.lb. default CONFIG_ROM_IMAGE_SIZE = 64 * 1024 -default CONFIG_FALLBACK_SIZE = 128 * 1024 +default CONFIG_FALLBACK_SIZE = CONFIG_ROM_IMAGE_SIZE default CONFIG_STACK_SIZE = 8 * 1024 default CONFIG_HEAP_SIZE = 16 * 1024 default CONFIG_HAVE_OPTION_TABLE = 0 @@ -101,5 +101,5 @@ # CBFS # # -default CONFIG_CBFS=0 +default CONFIG_CBFS=1 end Index: src/mainboard/gigabyte/m57sli/Options.lb =================================================================== --- src/mainboard/gigabyte/m57sli/Options.lb (revision 4472) +++ src/mainboard/gigabyte/m57sli/Options.lb (working copy) @@ -132,11 +132,9 @@ ## ## CONFIG_FALLBACK_SIZE is the amount of the ROM the complete fallback image will use ## -#default CONFIG_FALLBACK_SIZE=131072 -#default CONFIG_FALLBACK_SIZE=0x40000 #FALLBACK: 256K-4K -default CONFIG_FALLBACK_SIZE=0x3f000 +default CONFIG_FALLBACK_SIZE = CONFIG_ROM_IMAGE_SIZE #FAILOVER: 4K default CONFIG_FAILOVER_SIZE=0x01000 @@ -270,7 +268,7 @@ ### ## CONFIG_ROM_IMAGE_SIZE is the amount of space to allow coreboot to occupy. -default CONFIG_ROM_IMAGE_SIZE = 65536 +default CONFIG_ROM_IMAGE_SIZE = 65536 - CONFIG_FAILOVER_SIZE ## ## Use a small 8K stack @@ -365,6 +363,6 @@ # CBFS # # -default CONFIG_CBFS=0 +default CONFIG_CBFS=1 ### End Options.lb end Index: src/mainboard/ibm/e325/Options.lb =================================================================== --- src/mainboard/ibm/e325/Options.lb (revision 4472) +++ src/mainboard/ibm/e325/Options.lb (working copy) @@ -65,7 +65,7 @@ ## ## CONFIG_FALLBACK_SIZE is the amount of the ROM the complete fallback image will use ## -default CONFIG_FALLBACK_SIZE=0x40000 +default CONFIG_FALLBACK_SIZE = CONFIG_ROM_IMAGE_SIZE ## ## Build code for the fallback boot @@ -225,5 +225,5 @@ # CBFS # # -default CONFIG_CBFS=0 +default CONFIG_CBFS=1 end Index: src/mainboard/ibm/e326/Options.lb =================================================================== --- src/mainboard/ibm/e326/Options.lb (revision 4472) +++ src/mainboard/ibm/e326/Options.lb (working copy) @@ -67,7 +67,7 @@ ## ## CONFIG_FALLBACK_SIZE is the amount of the ROM the complete fallback image will use ## -default CONFIG_FALLBACK_SIZE=0x40000 +default CONFIG_FALLBACK_SIZE = CONFIG_ROM_IMAGE_SIZE ## ## Build code for the fallback boot @@ -231,5 +231,5 @@ # CBFS # # -default CONFIG_CBFS=0 +default CONFIG_CBFS=1 end Index: src/mainboard/iei/juki-511p/Options.lb =================================================================== --- src/mainboard/iei/juki-511p/Options.lb (revision 4472) +++ src/mainboard/iei/juki-511p/Options.lb (working copy) @@ -88,7 +88,7 @@ ## CONFIG_ROM_IMAGE_SIZE is the amount of space to allow coreboot to occupy. default CONFIG_ROM_IMAGE_SIZE = 65536 -default CONFIG_FALLBACK_SIZE = 131072 +default CONFIG_FALLBACK_SIZE = CONFIG_ROM_IMAGE_SIZE ## ## Use a small 8K stack @@ -150,5 +150,5 @@ # CBFS # # -default CONFIG_CBFS=0 +default CONFIG_CBFS=1 end Index: src/mainboard/iei/nova4899r/Options.lb =================================================================== --- src/mainboard/iei/nova4899r/Options.lb (revision 4472) +++ src/mainboard/iei/nova4899r/Options.lb (working copy) @@ -98,7 +98,7 @@ ## CONFIG_ROM_IMAGE_SIZE is the amount of space to allow coreboot to occupy. default CONFIG_ROM_IMAGE_SIZE = 65536 -default CONFIG_FALLBACK_SIZE = 131072 +default CONFIG_FALLBACK_SIZE = CONFIG_ROM_IMAGE_SIZE ## ## Use a small 8K stack @@ -177,5 +177,5 @@ # CBFS # # -default CONFIG_CBFS=0 +default CONFIG_CBFS=1 end Index: src/mainboard/iei/pcisa-lx-800-r10/Options.lb =================================================================== --- src/mainboard/iei/pcisa-lx-800-r10/Options.lb (revision 4472) +++ src/mainboard/iei/pcisa-lx-800-r10/Options.lb (working copy) @@ -85,7 +85,7 @@ default CONFIG_PIRQ_ROUTE = 1 default CONFIG_HAVE_OPTION_TABLE = 0 default CONFIG_ROM_IMAGE_SIZE = 64 * 1024 -default CONFIG_FALLBACK_SIZE = 128 * 1024 +default CONFIG_FALLBACK_SIZE = CONFIG_ROM_IMAGE_SIZE default CONFIG_USE_DCACHE_RAM = 1 default CONFIG_DCACHE_RAM_BASE = 0xc8000 default CONFIG_DCACHE_RAM_SIZE = 32 * 1024 @@ -111,5 +111,5 @@ # CBFS # # -default CONFIG_CBFS=0 +default CONFIG_CBFS=1 end Index: src/mainboard/intel/jarrell/Options.lb =================================================================== --- src/mainboard/intel/jarrell/Options.lb (revision 4472) +++ src/mainboard/intel/jarrell/Options.lb (working copy) @@ -161,7 +161,7 @@ ### Compute the location and size of where this firmware image ### (coreboot plus bootloader) will live in the boot rom chip. ### -default CONFIG_FALLBACK_SIZE=131072 +default CONFIG_FALLBACK_SIZE = CONFIG_ROM_IMAGE_SIZE ## ## Coreboot C code runs at this location in RAM @@ -246,5 +246,5 @@ # CBFS # # -default CONFIG_CBFS=0 +default CONFIG_CBFS=1 end Index: src/mainboard/intel/mtarvon/Options.lb =================================================================== --- src/mainboard/intel/mtarvon/Options.lb (revision 4472) +++ src/mainboard/intel/mtarvon/Options.lb (working copy) @@ -150,7 +150,7 @@ ### Compute the location and size of where this firmware image ### (coreboot plus bootloader) will live in the boot rom chip. ### -default CONFIG_FALLBACK_SIZE=131072 +default CONFIG_FALLBACK_SIZE = CONFIG_ROM_IMAGE_SIZE ## ## coreboot C code runs at this location in RAM @@ -229,5 +229,5 @@ # CBFS # # -default CONFIG_CBFS=0 +default CONFIG_CBFS=1 end Index: src/mainboard/intel/truxton/Options.lb =================================================================== --- src/mainboard/intel/truxton/Options.lb (revision 4472) +++ src/mainboard/intel/truxton/Options.lb (working copy) @@ -150,7 +150,7 @@ ### Compute the location and size of where this firmware image ### (coreboot plus bootloader) will live in the boot rom chip. ### -default CONFIG_FALLBACK_SIZE=131072 +default CONFIG_FALLBACK_SIZE = CONFIG_ROM_IMAGE_SIZE ## ## coreboot C code runs at this location in RAM @@ -231,5 +231,5 @@ # CBFS # # -default CONFIG_CBFS=0 +default CONFIG_CBFS=1 end Index: src/mainboard/intel/xe7501devkit/Options.lb =================================================================== --- src/mainboard/intel/xe7501devkit/Options.lb (revision 4472) +++ src/mainboard/intel/xe7501devkit/Options.lb (working copy) @@ -79,7 +79,7 @@ ## Build code for the fallback boot? ## default CONFIG_HAVE_FALLBACK_BOOT=1 -default CONFIG_FALLBACK_SIZE=131072 +default CONFIG_FALLBACK_SIZE = CONFIG_ROM_IMAGE_SIZE ## Delay timer options @@ -244,5 +244,5 @@ # CBFS # # -default CONFIG_CBFS=0 +default CONFIG_CBFS=1 end Index: src/mainboard/iwill/dk8_htx/Options.lb =================================================================== --- src/mainboard/iwill/dk8_htx/Options.lb (revision 4472) +++ src/mainboard/iwill/dk8_htx/Options.lb (working copy) @@ -105,11 +105,9 @@ ## ## CONFIG_FALLBACK_SIZE is the amount of the ROM the complete fallback image will use ## -#default CONFIG_FALLBACK_SIZE=131072 -#default CONFIG_FALLBACK_SIZE=0x40000 #FALLBACK: 256K-8K -default CONFIG_FALLBACK_SIZE=0x3e000 +default CONFIG_FALLBACK_SIZE = CONFIG_ROM_IMAGE_SIZE #FAILOVER: 8K default CONFIG_FAILOVER_SIZE=0x02000 @@ -238,7 +236,7 @@ ### ## CONFIG_ROM_IMAGE_SIZE is the amount of space to allow coreboot to occupy. -default CONFIG_ROM_IMAGE_SIZE = 65536 +default CONFIG_ROM_IMAGE_SIZE = 65536 - CONFIG_FAILOVER_SIZE ## ## Use a small 8K stack @@ -332,5 +330,5 @@ # CBFS # # -default CONFIG_CBFS=0 +default CONFIG_CBFS=1 end Index: src/mainboard/iwill/dk8s2/Options.lb =================================================================== --- src/mainboard/iwill/dk8s2/Options.lb (revision 4472) +++ src/mainboard/iwill/dk8s2/Options.lb (working copy) @@ -66,7 +66,7 @@ ## ## CONFIG_FALLBACK_SIZE is the amount of the ROM the complete fallback image will use ## -default CONFIG_FALLBACK_SIZE=0x40000 +default CONFIG_FALLBACK_SIZE = CONFIG_ROM_IMAGE_SIZE ## ## Build code for the fallback boot @@ -232,5 +232,5 @@ # CBFS # # -default CONFIG_CBFS=0 +default CONFIG_CBFS=1 end Index: src/mainboard/iwill/dk8x/Options.lb =================================================================== --- src/mainboard/iwill/dk8x/Options.lb (revision 4472) +++ src/mainboard/iwill/dk8x/Options.lb (working copy) @@ -66,7 +66,7 @@ ## ## CONFIG_FALLBACK_SIZE is the amount of the ROM the complete fallback image will use ## -default CONFIG_FALLBACK_SIZE=131072 +default CONFIG_FALLBACK_SIZE = CONFIG_ROM_IMAGE_SIZE ## ## Build code for the fallback boot @@ -231,5 +231,5 @@ # CBFS # # -default CONFIG_CBFS=0 +default CONFIG_CBFS=1 end Index: src/mainboard/jetway/j7f24/Options.lb =================================================================== --- src/mainboard/jetway/j7f24/Options.lb (revision 4472) +++ src/mainboard/jetway/j7f24/Options.lb (working copy) @@ -85,7 +85,7 @@ default CONFIG_HAVE_ACPI_TABLES = 0 default CONFIG_HAVE_OPTION_TABLE = 0 default CONFIG_ROM_IMAGE_SIZE = 64 * 1024 -default CONFIG_FALLBACK_SIZE = CONFIG_ROM_SIZE +default CONFIG_FALLBACK_SIZE = CONFIG_ROM_IMAGE_SIZE default CONFIG_USE_FALLBACK_IMAGE = 1 default CONFIG_STACK_SIZE = 8 * 1024 default CONFIG_HEAP_SIZE = 16 * 1024 @@ -109,5 +109,5 @@ # CBFS # # -default CONFIG_CBFS=0 +default CONFIG_CBFS=1 end Index: src/mainboard/lippert/frontrunner/Options.lb =================================================================== --- src/mainboard/lippert/frontrunner/Options.lb (revision 4472) +++ src/mainboard/lippert/frontrunner/Options.lb (working copy) @@ -88,7 +88,7 @@ ## CONFIG_ROM_IMAGE_SIZE is the amount of space to allow coreboot to occupy. default CONFIG_ROM_IMAGE_SIZE = 65536 -default CONFIG_FALLBACK_SIZE = 131072 +default CONFIG_FALLBACK_SIZE = CONFIG_ROM_IMAGE_SIZE ## ## Use a small 8K stack @@ -164,5 +164,5 @@ # CBFS # # -default CONFIG_CBFS=0 +default CONFIG_CBFS=1 end Index: src/mainboard/lippert/roadrunner-lx/Options.lb =================================================================== --- src/mainboard/lippert/roadrunner-lx/Options.lb (revision 4472) +++ src/mainboard/lippert/roadrunner-lx/Options.lb (working copy) @@ -129,7 +129,7 @@ ## CONFIG_ROM_IMAGE_SIZE is the amount of space to allow coreboot to occupy. default CONFIG_ROM_IMAGE_SIZE = 64 * 1024 -default CONFIG_FALLBACK_SIZE = 128 * 1024 +default CONFIG_FALLBACK_SIZE = CONFIG_ROM_IMAGE_SIZE ## ## enable CACHE_AS_RAM specifics @@ -215,5 +215,5 @@ # CBFS # # -default CONFIG_CBFS=0 +default CONFIG_CBFS=1 end Index: src/mainboard/lippert/spacerunner-lx/Options.lb =================================================================== --- src/mainboard/lippert/spacerunner-lx/Options.lb (revision 4472) +++ src/mainboard/lippert/spacerunner-lx/Options.lb (working copy) @@ -129,7 +129,7 @@ ## CONFIG_ROM_IMAGE_SIZE is the amount of space to allow coreboot to occupy. default CONFIG_ROM_IMAGE_SIZE = 64 * 1024 -default CONFIG_FALLBACK_SIZE = 128 * 1024 +default CONFIG_FALLBACK_SIZE = CONFIG_ROM_IMAGE_SIZE ## ## enable CACHE_AS_RAM specifics @@ -215,5 +215,5 @@ # CBFS # # -default CONFIG_CBFS=0 +default CONFIG_CBFS=1 end Index: src/mainboard/mitac/6513wu/Options.lb =================================================================== --- src/mainboard/mitac/6513wu/Options.lb (revision 4472) +++ src/mainboard/mitac/6513wu/Options.lb (working copy) @@ -75,10 +75,10 @@ # ROM layout default CONFIG_ROM_SIZE = 512 * 1024 default CONFIG_ROM_IMAGE_SIZE = 128 * 1024 -default CONFIG_FALLBACK_SIZE = 256 * 1024 +default CONFIG_FALLBACK_SIZE = CONFIG_ROM_IMAGE_SIZE default CONFIG_HAVE_FALLBACK_BOOT = 1 default CONFIG_ROM_PAYLOAD = 1 -default CONFIG_CBFS = 0 +default CONFIG_CBFS=1 # RAM layout default CONFIG_RAMBASE = 0x00004000 Index: src/mainboard/motorola/sandpoint/Options.lb =================================================================== --- src/mainboard/motorola/sandpoint/Options.lb (revision 4472) +++ src/mainboard/motorola/sandpoint/Options.lb (working copy) @@ -130,5 +130,5 @@ # CBFS # # -default CONFIG_CBFS=0 +default CONFIG_CBFS=1 end Index: src/mainboard/motorola/sandpointx3_altimus_mpc7410/Options.lb =================================================================== --- src/mainboard/motorola/sandpointx3_altimus_mpc7410/Options.lb (revision 4472) +++ src/mainboard/motorola/sandpointx3_altimus_mpc7410/Options.lb (working copy) @@ -125,5 +125,5 @@ # CBFS # # -default CONFIG_CBFS=0 +default CONFIG_CBFS=1 end Index: src/mainboard/msi/ms6119/Options.lb =================================================================== --- src/mainboard/msi/ms6119/Options.lb (revision 4472) +++ src/mainboard/msi/ms6119/Options.lb (working copy) @@ -77,7 +77,7 @@ default CONFIG_MAINBOARD_VENDOR = "N/A" # Override this in targets/*/Config.lb. default CONFIG_MAINBOARD_PART_NUMBER = "N/A" # Override this in targets/*/Config.lb. default CONFIG_ROM_IMAGE_SIZE = 64 * 1024 -default CONFIG_FALLBACK_SIZE = 128 * 1024 +default CONFIG_FALLBACK_SIZE = CONFIG_ROM_IMAGE_SIZE default CONFIG_STACK_SIZE = 8 * 1024 default CONFIG_HEAP_SIZE = 16 * 1024 default CONFIG_HAVE_OPTION_TABLE = 0 @@ -101,5 +101,5 @@ # CBFS # # -default CONFIG_CBFS=0 +default CONFIG_CBFS=1 end Index: src/mainboard/msi/ms6147/Options.lb =================================================================== --- src/mainboard/msi/ms6147/Options.lb (revision 4472) +++ src/mainboard/msi/ms6147/Options.lb (working copy) @@ -77,7 +77,7 @@ default CONFIG_MAINBOARD_VENDOR = "N/A" # Override this in targets/*/Config.lb. default CONFIG_MAINBOARD_PART_NUMBER = "N/A" # Override this in targets/*/Config.lb. default CONFIG_ROM_IMAGE_SIZE = 64 * 1024 -default CONFIG_FALLBACK_SIZE = 128 * 1024 +default CONFIG_FALLBACK_SIZE = CONFIG_ROM_IMAGE_SIZE default CONFIG_STACK_SIZE = 8 * 1024 default CONFIG_HEAP_SIZE = 16 * 1024 default CONFIG_HAVE_OPTION_TABLE = 0 @@ -101,5 +101,5 @@ # CBFS # # -default CONFIG_CBFS=0 +default CONFIG_CBFS=1 end Index: src/mainboard/msi/ms7135/Options.lb =================================================================== --- src/mainboard/msi/ms7135/Options.lb (revision 4472) +++ src/mainboard/msi/ms7135/Options.lb (working copy) @@ -112,7 +112,7 @@ ## ## CONFIG_FALLBACK_SIZE is the amount of the ROM the complete fallback image will use ## -default CONFIG_FALLBACK_SIZE=(252*1024) +default CONFIG_FALLBACK_SIZE = CONFIG_ROM_IMAGE_SIZE #FAILOVER: 4K default CONFIG_FAILOVER_SIZE=(4*1024) @@ -228,8 +228,7 @@ ### ## CONFIG_ROM_IMAGE_SIZE is the amount of space to allow coreboot to occupy. -default CONFIG_ROM_IMAGE_SIZE = (64*1024) -#65536 +default CONFIG_ROM_IMAGE_SIZE = (64*1024) - CONFIG_FAILOVER_SIZE ## ## Use a small 8K stack @@ -325,5 +324,5 @@ # CBFS # # -default CONFIG_CBFS=0 +default CONFIG_CBFS=1 end Index: src/mainboard/msi/ms7260/Options.lb =================================================================== --- src/mainboard/msi/ms7260/Options.lb (revision 4472) +++ src/mainboard/msi/ms7260/Options.lb (working copy) @@ -101,7 +101,7 @@ uses CONFIG_USE_PRINTK_IN_CAR default CONFIG_ROM_SIZE = 512 * 1024 -default CONFIG_FALLBACK_SIZE = (256 * 1024) - (4 * 1024) +default CONFIG_FALLBACK_SIZE = CONFIG_ROM_IMAGE_SIZE default CONFIG_FAILOVER_SIZE = 4 * 1024 default CONFIG_LB_MEM_TOPK = 2048 # 1MB more for pgtbl. default CONFIG_HAVE_FALLBACK_BOOT = 1 @@ -169,7 +169,7 @@ default CONFIG_MAINBOARD_VENDOR = "MSI" default CONFIG_MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID = 0x1462 default CONFIG_MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID = 0x7260 -default CONFIG_ROM_IMAGE_SIZE = 65536 +default CONFIG_ROM_IMAGE_SIZE = 65536 - CONFIG_FAILOVER_SIZE default CONFIG_STACK_SIZE = 0x2000 default CONFIG_HEAP_SIZE = 0x8000 default CONFIG_USE_OPTION_TABLE = (!CONFIG_USE_FALLBACK_IMAGE) && (!CONFIG_USE_FAILOVER_IMAGE) @@ -190,5 +190,5 @@ # CBFS # # -default CONFIG_CBFS=0 +default CONFIG_CBFS=1 end Index: src/mainboard/msi/ms9185/Options.lb =================================================================== --- src/mainboard/msi/ms9185/Options.lb (revision 4472) +++ src/mainboard/msi/ms9185/Options.lb (working copy) @@ -118,10 +118,7 @@ ## ## CONFIG_FALLBACK_SIZE is the amount of the ROM the complete fallback image will use -## -#default CONFIG_FALLBACK_SIZE=131072 -#256K -default CONFIG_FALLBACK_SIZE=0x40000 +default CONFIG_FALLBACK_SIZE = CONFIG_ROM_IMAGE_SIZE #more 1M for pgtbl default CONFIG_LB_MEM_TOPK=2048 @@ -334,5 +331,5 @@ # CBFS # # -default CONFIG_CBFS=0 +default CONFIG_CBFS=1 end Index: src/mainboard/msi/ms9282/Options.lb =================================================================== --- src/mainboard/msi/ms9282/Options.lb (revision 4472) +++ src/mainboard/msi/ms9282/Options.lb (working copy) @@ -112,9 +112,7 @@ ## ## CONFIG_FALLBACK_SIZE is the amount of the ROM the complete fallback image will use ## -#default CONFIG_FALLBACK_SIZE=131072 -#256K -default CONFIG_FALLBACK_SIZE=0x40000 +default CONFIG_FALLBACK_SIZE = CONFIG_ROM_IMAGE_SIZE ### ### Build options @@ -313,5 +311,5 @@ # CBFS # # -default CONFIG_CBFS=0 +default CONFIG_CBFS=1 end Index: src/mainboard/nec/powermate2000/Options.lb =================================================================== --- src/mainboard/nec/powermate2000/Options.lb (revision 4472) +++ src/mainboard/nec/powermate2000/Options.lb (working copy) @@ -74,7 +74,7 @@ default CONFIG_MAINBOARD_VENDOR = "N/A" # Override this in targets/*/Config.lb. default CONFIG_MAINBOARD_PART_NUMBER = "N/A" # Override this in targets/*/Config.lb. default CONFIG_ROM_IMAGE_SIZE = 64 * 1024 -default CONFIG_FALLBACK_SIZE = 128 * 1024 +default CONFIG_FALLBACK_SIZE = CONFIG_ROM_IMAGE_SIZE default CONFIG_STACK_SIZE = 8 * 1024 default CONFIG_HEAP_SIZE = 16 * 1024 default CONFIG_HAVE_OPTION_TABLE = 0 @@ -100,5 +100,5 @@ # CBFS # # -default CONFIG_CBFS=0 +default CONFIG_CBFS=1 end Index: src/mainboard/newisys/khepri/Options.lb =================================================================== --- src/mainboard/newisys/khepri/Options.lb (revision 4472) +++ src/mainboard/newisys/khepri/Options.lb (working copy) @@ -73,9 +73,7 @@ ## ## CONFIG_FALLBACK_SIZE is the amount of the ROM the complete fallback image will use ## -#default CONFIG_FALLBACK_SIZE=131072 -#256K -default CONFIG_FALLBACK_SIZE=0x40000 +default CONFIG_FALLBACK_SIZE = CONFIG_ROM_IMAGE_SIZE ## ## Build code for the fallback boot @@ -249,5 +247,5 @@ # CBFS # # -default CONFIG_CBFS=0 +default CONFIG_CBFS=1 end Index: src/mainboard/nvidia/l1_2pvv/Options.lb =================================================================== --- src/mainboard/nvidia/l1_2pvv/Options.lb (revision 4472) +++ src/mainboard/nvidia/l1_2pvv/Options.lb (working copy) @@ -129,11 +129,9 @@ ## ## CONFIG_FALLBACK_SIZE is the amount of the ROM the complete fallback image will use ## -#default CONFIG_FALLBACK_SIZE=131072 -#default CONFIG_FALLBACK_SIZE=0x40000 #FALLBACK: 256K-4K -default CONFIG_FALLBACK_SIZE=0x3f000 +default CONFIG_FALLBACK_SIZE = CONFIG_ROM_IMAGE_SIZE #FAILOVER: 4K default CONFIG_FAILOVER_SIZE=0x01000 @@ -259,7 +257,7 @@ ### ## CONFIG_ROM_IMAGE_SIZE is the amount of space to allow coreboot to occupy. -default CONFIG_ROM_IMAGE_SIZE = 65536 +default CONFIG_ROM_IMAGE_SIZE = 65536 - CONFIG_FAILOVER_SIZE ## ## Use a small 8K stack @@ -355,5 +353,5 @@ # CBFS # # -default CONFIG_CBFS=0 +default CONFIG_CBFS=1 end Index: src/mainboard/olpc/btest/Options.lb =================================================================== --- src/mainboard/olpc/btest/Options.lb (revision 4472) +++ src/mainboard/olpc/btest/Options.lb (working copy) @@ -89,7 +89,7 @@ ## CONFIG_ROM_IMAGE_SIZE is the amount of space to allow coreboot to occupy. default CONFIG_ROM_IMAGE_SIZE = 65536 -default CONFIG_FALLBACK_SIZE = 131072 +default CONFIG_FALLBACK_SIZE = CONFIG_ROM_IMAGE_SIZE ## ## Use a small 8K stack @@ -165,5 +165,5 @@ # CBFS # # -default CONFIG_CBFS=0 +default CONFIG_CBFS=1 end Index: src/mainboard/olpc/rev_a/Options.lb =================================================================== --- src/mainboard/olpc/rev_a/Options.lb (revision 4472) +++ src/mainboard/olpc/rev_a/Options.lb (working copy) @@ -89,7 +89,7 @@ ## CONFIG_ROM_IMAGE_SIZE is the amount of space to allow coreboot to occupy. default CONFIG_ROM_IMAGE_SIZE = 65536 -default CONFIG_FALLBACK_SIZE = 131072 +default CONFIG_FALLBACK_SIZE = CONFIG_ROM_IMAGE_SIZE ## ## Use a small 8K stack @@ -165,5 +165,5 @@ # CBFS # # -default CONFIG_CBFS=0 +default CONFIG_CBFS=1 end Index: src/mainboard/pcengines/alix1c/Options.lb =================================================================== --- src/mainboard/pcengines/alix1c/Options.lb (revision 4472) +++ src/mainboard/pcengines/alix1c/Options.lb (working copy) @@ -119,7 +119,7 @@ ## CONFIG_ROM_IMAGE_SIZE is the amount of space to allow coreboot to occupy. default CONFIG_ROM_IMAGE_SIZE = 65536 -default CONFIG_FALLBACK_SIZE = 131072 +default CONFIG_FALLBACK_SIZE = CONFIG_ROM_IMAGE_SIZE ## ## enable CACHE_AS_RAM specifics @@ -203,5 +203,5 @@ # CBFS # # -default CONFIG_CBFS=0 +default CONFIG_CBFS=1 end Index: src/mainboard/rca/rm4100/Options.lb =================================================================== --- src/mainboard/rca/rm4100/Options.lb (revision 4472) +++ src/mainboard/rca/rm4100/Options.lb (working copy) @@ -68,7 +68,7 @@ default CONFIG_ROM_SIZE = 512 * 1024 default CONFIG_ROM_IMAGE_SIZE = 128 * 1024 default CONFIG_HAVE_FALLBACK_BOOT = 1 -default CONFIG_FALLBACK_SIZE = 512 * 1024 +default CONFIG_FALLBACK_SIZE = CONFIG_ROM_IMAGE_SIZE default CONFIG_UDELAY_TSC = 1 default CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1 default CONFIG_HAVE_PIRQ_TABLE = 1 @@ -100,5 +100,5 @@ # CBFS # # -default CONFIG_CBFS=0 +default CONFIG_CBFS=1 end Index: src/mainboard/soyo/sy-6ba-plus-iii/Options.lb =================================================================== --- src/mainboard/soyo/sy-6ba-plus-iii/Options.lb (revision 4472) +++ src/mainboard/soyo/sy-6ba-plus-iii/Options.lb (working copy) @@ -77,7 +77,7 @@ default CONFIG_MAINBOARD_VENDOR = "N/A" # Override this in targets/*/Config.lb. default CONFIG_MAINBOARD_PART_NUMBER = "N/A" # Override this in targets/*/Config.lb. default CONFIG_ROM_IMAGE_SIZE = 64 * 1024 -default CONFIG_FALLBACK_SIZE = 128 * 1024 +default CONFIG_FALLBACK_SIZE = CONFIG_ROM_IMAGE_SIZE default CONFIG_STACK_SIZE = 8 * 1024 default CONFIG_HEAP_SIZE = 16 * 1024 default CONFIG_HAVE_OPTION_TABLE = 0 @@ -96,5 +96,5 @@ default CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9 default CONFIG_CONSOLE_VGA = 1 default CONFIG_PCI_ROM_RUN = 1 -default CONFIG_CBFS = 0 +default CONFIG_CBFS=1 end Index: src/mainboard/sunw/ultra40/Options.lb =================================================================== --- src/mainboard/sunw/ultra40/Options.lb (revision 4472) +++ src/mainboard/sunw/ultra40/Options.lb (working copy) @@ -82,9 +82,7 @@ ## ## CONFIG_FALLBACK_SIZE is the amount of the ROM the complete fallback image will use ## -#default CONFIG_FALLBACK_SIZE=131072 -#256K -default CONFIG_FALLBACK_SIZE=0x40000 +default CONFIG_FALLBACK_SIZE = CONFIG_ROM_IMAGE_SIZE ### ### Build options @@ -282,5 +280,5 @@ # CBFS # # -default CONFIG_CBFS=0 +default CONFIG_CBFS=1 end Index: src/mainboard/supermicro/h8dme/Options.lb =================================================================== --- src/mainboard/supermicro/h8dme/Options.lb (revision 4472) +++ src/mainboard/supermicro/h8dme/Options.lb (working copy) @@ -133,11 +133,9 @@ ## ## CONFIG_FALLBACK_SIZE is the amount of the ROM the complete fallback image will use ## -#default CONFIG_FALLBACK_SIZE=131072 -#default CONFIG_FALLBACK_SIZE=0x40000 #FALLBACK: 256K-4K -default CONFIG_FALLBACK_SIZE=0x3f000 +default CONFIG_FALLBACK_SIZE = CONFIG_ROM_IMAGE_SIZE #FAILOVER: 4K default CONFIG_FAILOVER_SIZE=0x01000 @@ -261,7 +259,7 @@ ### ## CONFIG_ROM_IMAGE_SIZE is the amount of space to allow coreboot to occupy. -default CONFIG_ROM_IMAGE_SIZE = 65536 +default CONFIG_ROM_IMAGE_SIZE = 65536 - CONFIG_FAILOVER_SIZE ## ## Use a small 8K stack @@ -357,5 +355,5 @@ # CBFS # # -default CONFIG_CBFS=0 +default CONFIG_CBFS=1 end Index: src/mainboard/supermicro/x6dai_g/Options.lb =================================================================== --- src/mainboard/supermicro/x6dai_g/Options.lb (revision 4472) +++ src/mainboard/supermicro/x6dai_g/Options.lb (working copy) @@ -147,7 +147,7 @@ ### Compute the location and size of where this firmware image ### (coreboot plus bootloader) will live in the boot rom chip. ### -default CONFIG_FALLBACK_SIZE=131072 +default CONFIG_FALLBACK_SIZE = CONFIG_ROM_IMAGE_SIZE ## ## Coreboot C code runs at this location in RAM @@ -233,5 +233,5 @@ # CBFS # # -default CONFIG_CBFS=0 +default CONFIG_CBFS=1 end Index: src/mainboard/supermicro/x6dhe_g/Options.lb =================================================================== --- src/mainboard/supermicro/x6dhe_g/Options.lb (revision 4472) +++ src/mainboard/supermicro/x6dhe_g/Options.lb (working copy) @@ -147,7 +147,7 @@ ### Compute the location and size of where this firmware image ### (coreboot plus bootloader) will live in the boot rom chip. ### -default CONFIG_FALLBACK_SIZE=131072 +default CONFIG_FALLBACK_SIZE = CONFIG_ROM_IMAGE_SIZE ## ## Coreboot C code runs at this location in RAM @@ -233,5 +233,5 @@ # CBFS # # -default CONFIG_CBFS=0 +default CONFIG_CBFS=1 end Index: src/mainboard/supermicro/x6dhe_g2/Options.lb =================================================================== --- src/mainboard/supermicro/x6dhe_g2/Options.lb (revision 4472) +++ src/mainboard/supermicro/x6dhe_g2/Options.lb (working copy) @@ -147,7 +147,7 @@ ### Compute the location and size of where this firmware image ### (coreboot plus bootloader) will live in the boot rom chip. ### -default CONFIG_FALLBACK_SIZE=131072 +default CONFIG_FALLBACK_SIZE = CONFIG_ROM_IMAGE_SIZE ## ## Coreboot C code runs at this location in RAM @@ -233,5 +233,5 @@ # CBFS # # -default CONFIG_CBFS=0 +default CONFIG_CBFS=1 end Index: src/mainboard/supermicro/x6dhr_ig/Options.lb =================================================================== --- src/mainboard/supermicro/x6dhr_ig/Options.lb (revision 4472) +++ src/mainboard/supermicro/x6dhr_ig/Options.lb (working copy) @@ -147,7 +147,7 @@ ### Compute the location and size of where this firmware image ### (coreboot plus bootloader) will live in the boot rom chip. ### -default CONFIG_FALLBACK_SIZE=131072 +default CONFIG_FALLBACK_SIZE = CONFIG_ROM_IMAGE_SIZE ## ## Coreboot C code runs at this location in RAM @@ -232,5 +232,5 @@ # CBFS # # -default CONFIG_CBFS=0 +default CONFIG_CBFS=1 end Index: src/mainboard/supermicro/x6dhr_ig2/Options.lb =================================================================== --- src/mainboard/supermicro/x6dhr_ig2/Options.lb (revision 4472) +++ src/mainboard/supermicro/x6dhr_ig2/Options.lb (working copy) @@ -147,7 +147,7 @@ ### Compute the location and size of where this firmware image ### (coreboot plus bootloader) will live in the boot rom chip. ### -default CONFIG_FALLBACK_SIZE=131072 +default CONFIG_FALLBACK_SIZE = CONFIG_ROM_IMAGE_SIZE ## ## Coreboot C code runs at this location in RAM @@ -232,5 +232,5 @@ # CBFS # # -default CONFIG_CBFS=0 +default CONFIG_CBFS=1 end Index: src/mainboard/technexion/tim8690/Options.lb =================================================================== --- src/mainboard/technexion/tim8690/Options.lb (revision 4472) +++ src/mainboard/technexion/tim8690/Options.lb (working copy) @@ -106,9 +106,7 @@ ## ## CONFIG_FALLBACK_SIZE is the amount of the ROM the complete fallback image will use ## -#default CONFIG_FALLBACK_SIZE=131072 -#256K -default CONFIG_FALLBACK_SIZE=0x40000 +default CONFIG_FALLBACK_SIZE = CONFIG_ROM_IMAGE_SIZE ## ## Build code for the fallback boot Index: src/mainboard/technologic/ts5300/Options.lb =================================================================== --- src/mainboard/technologic/ts5300/Options.lb (revision 4472) +++ src/mainboard/technologic/ts5300/Options.lb (working copy) @@ -108,7 +108,7 @@ ## CONFIG_ROM_IMAGE_SIZE is the amount of space to allow coreboot to occupy. default CONFIG_ROM_IMAGE_SIZE = 65536 -default CONFIG_FALLBACK_SIZE = 131072 +default CONFIG_FALLBACK_SIZE = CONFIG_ROM_IMAGE_SIZE ## ## Use a small 8K stack @@ -140,5 +140,5 @@ # CBFS # # -default CONFIG_CBFS=0 +default CONFIG_CBFS=1 end Index: src/mainboard/televideo/tc7020/Options.lb =================================================================== --- src/mainboard/televideo/tc7020/Options.lb (revision 4472) +++ src/mainboard/televideo/tc7020/Options.lb (working copy) @@ -88,7 +88,7 @@ default CONFIG_IRQ_SLOT_COUNT = 3 # Soldered NIC, internal USB, mini PCI slot default CONFIG_HAVE_OPTION_TABLE = 0 default CONFIG_ROM_IMAGE_SIZE = 64 * 1024 -default CONFIG_FALLBACK_SIZE = 128 * 1024 +default CONFIG_FALLBACK_SIZE = CONFIG_ROM_IMAGE_SIZE default CONFIG_STACK_SIZE = 8 * 1024 default CONFIG_HEAP_SIZE = 16 * 1024 default CONFIG_USE_OPTION_TABLE = 0 @@ -108,5 +108,5 @@ # CBFS # # -default CONFIG_CBFS=0 +default CONFIG_CBFS=1 end Index: src/mainboard/thomson/ip1000/Options.lb =================================================================== --- src/mainboard/thomson/ip1000/Options.lb (revision 4472) +++ src/mainboard/thomson/ip1000/Options.lb (working copy) @@ -68,7 +68,7 @@ default CONFIG_ROM_SIZE = 512 * 1024 default CONFIG_ROM_IMAGE_SIZE = 128 * 1024 default CONFIG_HAVE_FALLBACK_BOOT = 1 -default CONFIG_FALLBACK_SIZE = 256 * 1024 +default CONFIG_FALLBACK_SIZE = CONFIG_ROM_IMAGE_SIZE default CONFIG_UDELAY_TSC = 1 default CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1 default CONFIG_HAVE_PIRQ_TABLE = 1 @@ -100,5 +100,5 @@ # CBFS # # -default CONFIG_CBFS=0 +default CONFIG_CBFS=1 end Index: src/mainboard/totalimpact/briq/Options.lb =================================================================== --- src/mainboard/totalimpact/briq/Options.lb (revision 4472) +++ src/mainboard/totalimpact/briq/Options.lb (working copy) @@ -132,5 +132,5 @@ # CBFS # # -default CONFIG_CBFS=0 +default CONFIG_CBFS=1 end Index: src/mainboard/tyan/s1846/Options.lb =================================================================== --- src/mainboard/tyan/s1846/Options.lb (revision 4472) +++ src/mainboard/tyan/s1846/Options.lb (working copy) @@ -78,7 +78,7 @@ default CONFIG_MAINBOARD_VENDOR = "N/A" # Override this in targets/*/Config.lb. default CONFIG_MAINBOARD_PART_NUMBER = "N/A" # Override this in targets/*/Config.lb. default CONFIG_ROM_IMAGE_SIZE = 64 * 1024 -default CONFIG_FALLBACK_SIZE = 128 * 1024 +default CONFIG_FALLBACK_SIZE = CONFIG_ROM_IMAGE_SIZE default CONFIG_STACK_SIZE = 8 * 1024 default CONFIG_HEAP_SIZE = 16 * 1024 default CONFIG_HAVE_OPTION_TABLE = 0 @@ -102,5 +102,5 @@ # CBFS # # -default CONFIG_CBFS=0 +default CONFIG_CBFS=1 end Index: src/mainboard/tyan/s2735/Options.lb =================================================================== --- src/mainboard/tyan/s2735/Options.lb (revision 4472) +++ src/mainboard/tyan/s2735/Options.lb (working copy) @@ -76,7 +76,7 @@ ## ## CONFIG_FALLBACK_SIZE is the amount of the ROM the complete fallback image will use ## -default CONFIG_FALLBACK_SIZE=131072 +default CONFIG_FALLBACK_SIZE = CONFIG_ROM_IMAGE_SIZE ### ### Build options @@ -260,5 +260,5 @@ # CBFS # # -default CONFIG_CBFS=0 +default CONFIG_CBFS=1 end Index: src/mainboard/tyan/s2850/Options.lb =================================================================== --- src/mainboard/tyan/s2850/Options.lb (revision 4472) +++ src/mainboard/tyan/s2850/Options.lb (working copy) @@ -74,9 +74,7 @@ ## ## CONFIG_FALLBACK_SIZE is the amount of the ROM the complete fallback image will use ## -#default CONFIG_FALLBACK_SIZE=131072 -#256K -default CONFIG_FALLBACK_SIZE=0x40000 +default CONFIG_FALLBACK_SIZE = CONFIG_ROM_IMAGE_SIZE ## ## Build code for the fallback boot @@ -250,5 +248,5 @@ # CBFS # # -default CONFIG_CBFS=0 +default CONFIG_CBFS=1 end Index: src/mainboard/tyan/s2875/Options.lb =================================================================== --- src/mainboard/tyan/s2875/Options.lb (revision 4472) +++ src/mainboard/tyan/s2875/Options.lb (working copy) @@ -74,9 +74,7 @@ ## ## CONFIG_FALLBACK_SIZE is the amount of the ROM the complete fallback image will use ## -#default CONFIG_FALLBACK_SIZE=131072 -#256K -default CONFIG_FALLBACK_SIZE=0x40000 +default CONFIG_FALLBACK_SIZE = CONFIG_ROM_IMAGE_SIZE ## @@ -251,5 +249,5 @@ # CBFS # # -default CONFIG_CBFS=0 +default CONFIG_CBFS=1 end Index: src/mainboard/tyan/s2880/Options.lb =================================================================== --- src/mainboard/tyan/s2880/Options.lb (revision 4472) +++ src/mainboard/tyan/s2880/Options.lb (working copy) @@ -74,9 +74,7 @@ ## ## CONFIG_FALLBACK_SIZE is the amount of the ROM the complete fallback image will use ## -#default CONFIG_FALLBACK_SIZE=131072 -#256K -default CONFIG_FALLBACK_SIZE=0x40000 +default CONFIG_FALLBACK_SIZE = CONFIG_ROM_IMAGE_SIZE ## ## Build code for the fallback boot @@ -250,5 +248,5 @@ # CBFS # # -default CONFIG_CBFS=0 +default CONFIG_CBFS=1 end Index: src/mainboard/tyan/s2881/Options.lb =================================================================== --- src/mainboard/tyan/s2881/Options.lb (revision 4472) +++ src/mainboard/tyan/s2881/Options.lb (working copy) @@ -79,9 +79,7 @@ ## ## CONFIG_FALLBACK_SIZE is the amount of the ROM the complete fallback image will use ## -#default CONFIG_FALLBACK_SIZE=131072 -#256K -default CONFIG_FALLBACK_SIZE=0x40000 +default CONFIG_FALLBACK_SIZE = CONFIG_ROM_IMAGE_SIZE ## ## Build code for the fallback boot @@ -267,5 +265,5 @@ # CBFS # # -default CONFIG_CBFS=0 +default CONFIG_CBFS=1 end Index: src/mainboard/tyan/s2882/Options.lb =================================================================== --- src/mainboard/tyan/s2882/Options.lb (revision 4472) +++ src/mainboard/tyan/s2882/Options.lb (working copy) @@ -74,9 +74,7 @@ ## ## CONFIG_FALLBACK_SIZE is the amount of the ROM the complete fallback image will use ## -#default CONFIG_FALLBACK_SIZE=131072 -#256K -default CONFIG_FALLBACK_SIZE=0x40000 +default CONFIG_FALLBACK_SIZE = CONFIG_ROM_IMAGE_SIZE ## ## Build code for the fallback boot @@ -250,5 +248,5 @@ # CBFS # # -default CONFIG_CBFS=0 +default CONFIG_CBFS=1 end Index: src/mainboard/tyan/s2885/Options.lb =================================================================== --- src/mainboard/tyan/s2885/Options.lb (revision 4472) +++ src/mainboard/tyan/s2885/Options.lb (working copy) @@ -85,9 +85,7 @@ ## ## CONFIG_FALLBACK_SIZE is the amount of the ROM the complete fallback image will use ## -#default CONFIG_FALLBACK_SIZE=131072 -#256K -default CONFIG_FALLBACK_SIZE=0x40000 +default CONFIG_FALLBACK_SIZE = CONFIG_ROM_IMAGE_SIZE ## ## Build code for the fallback boot @@ -277,5 +275,5 @@ # CBFS # # -default CONFIG_CBFS=0 +default CONFIG_CBFS=1 end Index: src/mainboard/tyan/s2891/Options.lb =================================================================== --- src/mainboard/tyan/s2891/Options.lb (revision 4472) +++ src/mainboard/tyan/s2891/Options.lb (working copy) @@ -88,9 +88,7 @@ ## ## CONFIG_FALLBACK_SIZE is the amount of the ROM the complete fallback image will use ## -#default CONFIG_FALLBACK_SIZE=131072 -#256K -default CONFIG_FALLBACK_SIZE=0x40000 +default CONFIG_FALLBACK_SIZE = CONFIG_ROM_IMAGE_SIZE ### ### Build options @@ -306,5 +304,5 @@ # CBFS # # -default CONFIG_CBFS=0 +default CONFIG_CBFS=1 end Index: src/mainboard/tyan/s2892/Options.lb =================================================================== --- src/mainboard/tyan/s2892/Options.lb (revision 4472) +++ src/mainboard/tyan/s2892/Options.lb (working copy) @@ -82,9 +82,7 @@ ## ## CONFIG_FALLBACK_SIZE is the amount of the ROM the complete fallback image will use ## -#default CONFIG_FALLBACK_SIZE=131072 -#256K -default CONFIG_FALLBACK_SIZE=0x40000 +default CONFIG_FALLBACK_SIZE = CONFIG_ROM_IMAGE_SIZE ### ### Build options @@ -294,5 +292,5 @@ # CBFS # # -default CONFIG_CBFS=0 +default CONFIG_CBFS=1 end Index: src/mainboard/tyan/s2895/Options.lb =================================================================== --- src/mainboard/tyan/s2895/Options.lb (revision 4472) +++ src/mainboard/tyan/s2895/Options.lb (working copy) @@ -91,11 +91,9 @@ ## ## CONFIG_FALLBACK_SIZE is the amount of the ROM the complete fallback image will use ## -#default CONFIG_FALLBACK_SIZE=131072 -#default CONFIG_FALLBACK_SIZE=0x40000 #FALLBACK: 256K-4K -default CONFIG_FALLBACK_SIZE=0x3f000 +default CONFIG_FALLBACK_SIZE = CONFIG_ROM_IMAGE_SIZE #FAILOVER: 4K default CONFIG_FAILOVER_SIZE=0x01000 @@ -218,7 +216,7 @@ ### ## CONFIG_ROM_IMAGE_SIZE is the amount of space to allow coreboot to occupy. -default CONFIG_ROM_IMAGE_SIZE = 65536 +default CONFIG_ROM_IMAGE_SIZE = 65536 - CONFIG_FAILOVER_SIZE ## ## Use a small 8K stack @@ -313,5 +311,5 @@ # CBFS # # -default CONFIG_CBFS=0 +default CONFIG_CBFS=1 end Index: src/mainboard/tyan/s2912_fam10/Options.lb =================================================================== --- src/mainboard/tyan/s2912_fam10/Options.lb (revision 4472) +++ src/mainboard/tyan/s2912_fam10/Options.lb (working copy) @@ -133,10 +133,8 @@ ## ## CONFIG_FALLBACK_SIZE is the amount of the ROM the complete fallback image will use ## -#default CONFIG_FALLBACK_SIZE=131072 -#default CONFIG_FALLBACK_SIZE=0x40000 -default CONFIG_FALLBACK_SIZE=0x3f000 +default CONFIG_FALLBACK_SIZE = CONFIG_ROM_IMAGE_SIZE default CONFIG_FAILOVER_SIZE=0x01000 #more 1M for pgtbl @@ -270,7 +268,7 @@ ### ## CONFIG_ROM_IMAGE_SIZE is the amount of space to allow coreboot to occupy. -default CONFIG_ROM_IMAGE_SIZE = 65536 +default CONFIG_ROM_IMAGE_SIZE = (128*1024) - CONFIG_FAILOVER_SIZE ## ## Use a small 8K stack @@ -366,5 +364,5 @@ # CBFS # # -default CONFIG_CBFS=0 +default CONFIG_CBFS=1 end Index: src/mainboard/tyan/s2912/Options.lb =================================================================== --- src/mainboard/tyan/s2912/Options.lb (revision 4472) +++ src/mainboard/tyan/s2912/Options.lb (working copy) @@ -129,11 +129,9 @@ ## ## CONFIG_FALLBACK_SIZE is the amount of the ROM the complete fallback image will use ## -#default CONFIG_FALLBACK_SIZE=131072 -#default CONFIG_FALLBACK_SIZE=0x40000 #FALLBACK: 256K-4K -default CONFIG_FALLBACK_SIZE=0x3f000 +default CONFIG_FALLBACK_SIZE = CONFIG_ROM_IMAGE_SIZE #FAILOVER: 4K default CONFIG_FAILOVER_SIZE=0x01000 @@ -261,7 +259,7 @@ ### ## CONFIG_ROM_IMAGE_SIZE is the amount of space to allow coreboot to occupy. -default CONFIG_ROM_IMAGE_SIZE = 65536 +default CONFIG_ROM_IMAGE_SIZE = 65536 - CONFIG_FAILOVER_SIZE ## ## Use a small 8K stack @@ -357,5 +355,5 @@ # CBFS # # -default CONFIG_CBFS=0 +default CONFIG_CBFS=1 end Index: src/mainboard/tyan/s4880/Options.lb =================================================================== --- src/mainboard/tyan/s4880/Options.lb (revision 4472) +++ src/mainboard/tyan/s4880/Options.lb (working copy) @@ -78,9 +78,7 @@ ## ## CONFIG_FALLBACK_SIZE is the amount of the ROM the complete fallback image will use ## -#default CONFIG_FALLBACK_SIZE=131072 -#256K -default CONFIG_FALLBACK_SIZE=0x40000 +default CONFIG_FALLBACK_SIZE = CONFIG_ROM_IMAGE_SIZE ## ## Build code for the fallback boot @@ -259,5 +257,5 @@ # CBFS # # -default CONFIG_CBFS=0 +default CONFIG_CBFS=1 end Index: src/mainboard/tyan/s4882/Options.lb =================================================================== --- src/mainboard/tyan/s4882/Options.lb (revision 4472) +++ src/mainboard/tyan/s4882/Options.lb (working copy) @@ -78,9 +78,7 @@ ## ## CONFIG_FALLBACK_SIZE is the amount of the ROM the complete fallback image will use ## -#default CONFIG_FALLBACK_SIZE=131072 -#256K -default CONFIG_FALLBACK_SIZE=0x40000 +default CONFIG_FALLBACK_SIZE = CONFIG_ROM_IMAGE_SIZE ## ## Build code for the fallback boot @@ -258,5 +256,5 @@ # CBFS # # -default CONFIG_CBFS=0 +default CONFIG_CBFS=1 end Index: src/mainboard/via/epia-cn/Options.lb =================================================================== --- src/mainboard/via/epia-cn/Options.lb (revision 4472) +++ src/mainboard/via/epia-cn/Options.lb (working copy) @@ -85,7 +85,7 @@ default CONFIG_HAVE_ACPI_TABLES = 0 default CONFIG_HAVE_OPTION_TABLE = 1 default CONFIG_ROM_IMAGE_SIZE = 64 * 1024 -default CONFIG_FALLBACK_SIZE = CONFIG_ROM_SIZE +default CONFIG_FALLBACK_SIZE = CONFIG_ROM_IMAGE_SIZE default CONFIG_USE_FALLBACK_IMAGE = 1 default CONFIG_STACK_SIZE = 8 * 1024 default CONFIG_HEAP_SIZE = 16 * 1024 @@ -109,5 +109,5 @@ # CBFS # # -default CONFIG_CBFS=0 +default CONFIG_CBFS=1 end Index: src/mainboard/via/epia-m/Options.lb =================================================================== --- src/mainboard/via/epia-m/Options.lb (revision 4472) +++ src/mainboard/via/epia-m/Options.lb (working copy) @@ -101,7 +101,7 @@ ## CONFIG_ROM_IMAGE_SIZE is the amount of space to allow coreboot to occupy. default CONFIG_ROM_IMAGE_SIZE = 65536 -default CONFIG_FALLBACK_SIZE = 131072 +default CONFIG_FALLBACK_SIZE = CONFIG_ROM_IMAGE_SIZE ## ## Use a small 8K stack @@ -148,5 +148,5 @@ # CBFS # # -default CONFIG_CBFS=0 +default CONFIG_CBFS=1 end Index: src/mainboard/via/epia-m700/Options.lb =================================================================== --- src/mainboard/via/epia-m700/Options.lb (revision 4472) +++ src/mainboard/via/epia-m700/Options.lb (working copy) @@ -124,7 +124,7 @@ default CONFIG_HAVE_ACPI_TABLES = 1 default CONFIG_HAVE_OPTION_TABLE = 1 default CONFIG_ROM_IMAGE_SIZE = 128 * 1024 -default CONFIG_FALLBACK_SIZE = CONFIG_ROM_SIZE +default CONFIG_FALLBACK_SIZE = CONFIG_ROM_IMAGE_SIZE default CONFIG_USE_FALLBACK_IMAGE = 1 default CONFIG_STACK_SIZE = 16 * 1024 default CONFIG_HEAP_SIZE = 20 * 1024 @@ -137,7 +137,7 @@ default HOSTCC = "gcc" default CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9 default CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9 -default CONFIG_CBFS = 0 +default CONFIG_CBFS=1 ## ## Set this to the max PCI bus number you would ever use for PCI config I/O. Index: src/mainboard/via/epia-n/Options.lb =================================================================== --- src/mainboard/via/epia-n/Options.lb (revision 4472) +++ src/mainboard/via/epia-n/Options.lb (working copy) @@ -98,7 +98,7 @@ #default CONFIG_PAYLOAD_SIZE = 125 * 1024 default CONFIG_ROM_IMAGE_SIZE = 128 * 1024 default CONFIG_PAYLOAD_SIZE = 256 * 1024 -default CONFIG_FALLBACK_SIZE = CONFIG_ROM_IMAGE_SIZE + CONFIG_PAYLOAD_SIZE +default CONFIG_FALLBACK_SIZE = CONFIG_ROM_IMAGE_SIZE default CONFIG_USE_FALLBACK_IMAGE = 1 default CONFIG_STACK_SIZE = 8 * 1024 default CONFIG_HEAP_SIZE = 16 * 1024 @@ -123,5 +123,5 @@ # CBFS # # -default CONFIG_CBFS=0 +default CONFIG_CBFS=1 end Index: src/mainboard/via/epia/Options.lb =================================================================== --- src/mainboard/via/epia/Options.lb (revision 4472) +++ src/mainboard/via/epia/Options.lb (working copy) @@ -111,7 +111,7 @@ ## CONFIG_ROM_IMAGE_SIZE is the amount of space to allow coreboot to occupy. default CONFIG_ROM_IMAGE_SIZE = 65536 -default CONFIG_FALLBACK_SIZE = 131072 +default CONFIG_FALLBACK_SIZE = CONFIG_ROM_IMAGE_SIZE ## ## Use a small 8K stack @@ -146,5 +146,5 @@ # CBFS # # -default CONFIG_CBFS=0 +default CONFIG_CBFS=1 end Index: src/mainboard/via/pc2500e/Options.lb =================================================================== --- src/mainboard/via/pc2500e/Options.lb (revision 4472) +++ src/mainboard/via/pc2500e/Options.lb (working copy) @@ -74,7 +74,7 @@ default CONFIG_ROM_SIZE = 512 * 1024 default CONFIG_ROM_IMAGE_SIZE = 64 * 1024 -default CONFIG_FALLBACK_SIZE = CONFIG_ROM_SIZE +default CONFIG_FALLBACK_SIZE = CONFIG_ROM_IMAGE_SIZE default CONFIG_IOAPIC = 0 default CONFIG_VIDEO_MB = 32 default CONFIG_CONSOLE_SERIAL8250 = 1 @@ -117,5 +117,5 @@ # CBFS # # -default CONFIG_CBFS=0 +default CONFIG_CBFS=1 end Index: src/mainboard/dell/s1850/Config.lb =================================================================== --- src/mainboard/dell/s1850/Config.lb (revision 4472) +++ src/mainboard/dell/s1850/Config.lb (working copy) @@ -4,7 +4,7 @@ default CONFIG_USE_OPTION_TABLE = !CONFIG_USE_FALLBACK_IMAGE ## CONFIG_XIP_ROM_SIZE must be a power of 2. -default CONFIG_XIP_ROM_SIZE = 128 * 1024 +default CONFIG_XIP_ROM_SIZE = 64 * 1024 include /config/nofailovercalculation.lb ## Index: src/mainboard/digitallogic/msm586seg/Config.lb =================================================================== --- src/mainboard/digitallogic/msm586seg/Config.lb (revision 4472) +++ src/mainboard/digitallogic/msm586seg/Config.lb (working copy) @@ -1,5 +1,4 @@ default CONFIG_ROM_SIZE = 512 * 1024 -default CONFIG_FALLBACK_SIZE = 0x10000 ## CONFIG_XIP_ROM_SIZE must be a power of 2. default CONFIG_XIP_ROM_SIZE = 32 * 1024 Index: src/mainboard/iei/juki-511p/Config.lb =================================================================== --- src/mainboard/iei/juki-511p/Config.lb (revision 4472) +++ src/mainboard/iei/juki-511p/Config.lb (working copy) @@ -3,8 +3,6 @@ ## (coreboot plus bootloader) will live in the boot rom chip. ## default CONFIG_ROM_SIZE = 256 * 1024 -default CONFIG_ROM_SECTION_SIZE = CONFIG_ROM_SIZE -default CONFIG_ROM_SECTION_OFFSET = 0 ## ## Compute the start location and size size of Index: src/mainboard/intel/jarrell/Config.lb =================================================================== --- src/mainboard/intel/jarrell/Config.lb (revision 4472) +++ src/mainboard/intel/jarrell/Config.lb (working copy) @@ -4,7 +4,7 @@ default CONFIG_USE_OPTION_TABLE = !CONFIG_USE_FALLBACK_IMAGE ## CONFIG_XIP_ROM_SIZE must be a power of 2. -default CONFIG_XIP_ROM_SIZE = 128 * 1024 +default CONFIG_XIP_ROM_SIZE = 64 * 1024 include /config/nofailovercalculation.lb ## Index: src/mainboard/intel/mtarvon/Config.lb =================================================================== --- src/mainboard/intel/mtarvon/Config.lb (revision 4472) +++ src/mainboard/intel/mtarvon/Config.lb (working copy) @@ -18,7 +18,7 @@ ## ## CONFIG_XIP_ROM_SIZE must be a power of 2. -default CONFIG_XIP_ROM_SIZE = 128 * 1024 +default CONFIG_XIP_ROM_SIZE = 64 * 1024 include /config/nofailovercalculation.lb ## Index: src/mainboard/intel/truxton/Config.lb =================================================================== --- src/mainboard/intel/truxton/Config.lb (revision 4472) +++ src/mainboard/intel/truxton/Config.lb (working copy) @@ -18,7 +18,7 @@ ## ## CONFIG_XIP_ROM_SIZE must be a power of 2. -default CONFIG_XIP_ROM_SIZE = 128 * 1024 +default CONFIG_XIP_ROM_SIZE = 64 * 1024 include /config/nofailovercalculation.lb ## Index: src/mainboard/intel/xe7501devkit/Config.lb =================================================================== --- src/mainboard/intel/xe7501devkit/Config.lb (revision 4472) +++ src/mainboard/intel/xe7501devkit/Config.lb (working copy) @@ -1,5 +1,5 @@ ## CONFIG_XIP_ROM_SIZE must be a power of 2. -default CONFIG_XIP_ROM_SIZE = 128 * 1024 +default CONFIG_XIP_ROM_SIZE = 64 * 1024 include /config/nofailovercalculation.lb arch i386 end Index: src/mainboard/supermicro/x6dai_g/Config.lb =================================================================== --- src/mainboard/supermicro/x6dai_g/Config.lb (revision 4472) +++ src/mainboard/supermicro/x6dai_g/Config.lb (working copy) @@ -4,7 +4,7 @@ default CONFIG_USE_OPTION_TABLE = !CONFIG_USE_FALLBACK_IMAGE ## CONFIG_XIP_ROM_SIZE must be a power of 2. -default CONFIG_XIP_ROM_SIZE = 128 * 1024 +default CONFIG_XIP_ROM_SIZE = 64 * 1024 include /config/nofailovercalculation.lb ## Index: src/mainboard/supermicro/x6dhe_g/Config.lb =================================================================== --- src/mainboard/supermicro/x6dhe_g/Config.lb (revision 4472) +++ src/mainboard/supermicro/x6dhe_g/Config.lb (working copy) @@ -4,7 +4,7 @@ default CONFIG_USE_OPTION_TABLE = !CONFIG_USE_FALLBACK_IMAGE ## CONFIG_XIP_ROM_SIZE must be a power of 2. -default CONFIG_XIP_ROM_SIZE = 128 * 1024 +default CONFIG_XIP_ROM_SIZE = 64 * 1024 include /config/nofailovercalculation.lb ## Set all of the defaults for an x86 architecture Index: src/mainboard/supermicro/x6dhe_g2/Config.lb =================================================================== --- src/mainboard/supermicro/x6dhe_g2/Config.lb (revision 4472) +++ src/mainboard/supermicro/x6dhe_g2/Config.lb (working copy) @@ -4,7 +4,7 @@ default CONFIG_USE_OPTION_TABLE = !CONFIG_USE_FALLBACK_IMAGE ## CONFIG_XIP_ROM_SIZE must be a power of 2. -default CONFIG_XIP_ROM_SIZE = 128 * 1024 +default CONFIG_XIP_ROM_SIZE = 64 * 1024 include /config/nofailovercalculation.lb ## Set all of the defaults for an x86 architecture Index: src/mainboard/supermicro/x6dhr_ig/Config.lb =================================================================== --- src/mainboard/supermicro/x6dhr_ig/Config.lb (revision 4472) +++ src/mainboard/supermicro/x6dhr_ig/Config.lb (working copy) @@ -4,7 +4,7 @@ default CONFIG_USE_OPTION_TABLE = !CONFIG_USE_FALLBACK_IMAGE ## CONFIG_XIP_ROM_SIZE must be a power of 2. -default CONFIG_XIP_ROM_SIZE = 128 * 1024 +default CONFIG_XIP_ROM_SIZE = 64 * 1024 include /config/nofailovercalculation.lb ## Index: src/mainboard/supermicro/x6dhr_ig2/Config.lb =================================================================== --- src/mainboard/supermicro/x6dhr_ig2/Config.lb (revision 4472) +++ src/mainboard/supermicro/x6dhr_ig2/Config.lb (working copy) @@ -4,7 +4,7 @@ default CONFIG_USE_OPTION_TABLE = !CONFIG_USE_FALLBACK_IMAGE ## CONFIG_XIP_ROM_SIZE must be a power of 2. -default CONFIG_XIP_ROM_SIZE = 128 * 1024 +default CONFIG_XIP_ROM_SIZE = 64 * 1024 include /config/nofailovercalculation.lb ## Index: src/mainboard/tyan/s2912_fam10/Config.lb =================================================================== --- src/mainboard/tyan/s2912_fam10/Config.lb (revision 4472) +++ src/mainboard/tyan/s2912_fam10/Config.lb (working copy) @@ -20,7 +20,7 @@ ## ## CONFIG_XIP_ROM_SIZE must be a power of 2. -default CONFIG_XIP_ROM_SIZE = 64 * 1024 +default CONFIG_XIP_ROM_SIZE = 128 * 1024 include /config/failovercalculation.lb arch i386 end Index: src/config/Options.lb =================================================================== --- src/config/Options.lb (revision 4472) +++ src/config/Options.lb (working copy) @@ -693,7 +693,7 @@ comment "Enable FAT filesystem support" end define CONFIG_CBFS - default 0 + default 1 export always comment "The new CBFS file system" end Index: targets/iwill/dk8_htx/Config-abuild.lb =================================================================== --- targets/iwill/dk8_htx/Config-abuild.lb (revision 4472) +++ targets/iwill/dk8_htx/Config-abuild.lb (working copy) @@ -13,7 +13,6 @@ romimage "normal" option CONFIG_USE_FAILOVER_IMAGE=0 option CONFIG_USE_FALLBACK_IMAGE=0 - option CONFIG_ROM_IMAGE_SIZE=0x20000 option COREBOOT_EXTRA_VERSION=".0-normal" payload __PAYLOAD__ end @@ -21,7 +20,6 @@ romimage "fallback" option CONFIG_USE_FAILOVER_IMAGE=0 option CONFIG_USE_FALLBACK_IMAGE=1 - option CONFIG_ROM_IMAGE_SIZE=0x20000 option COREBOOT_EXTRA_VERSION=".0-fallback" payload __PAYLOAD__ end Index: targets/supermicro/h8dme/Config-abuild.lb =================================================================== --- targets/supermicro/h8dme/Config-abuild.lb (revision 4472) +++ targets/supermicro/h8dme/Config-abuild.lb (working copy) @@ -13,7 +13,6 @@ romimage "normal" option CONFIG_USE_FAILOVER_IMAGE=0 option CONFIG_USE_FALLBACK_IMAGE=0 - option CONFIG_ROM_IMAGE_SIZE=0x20000 option COREBOOT_EXTRA_VERSION=".0-normal" payload __PAYLOAD__ end @@ -21,7 +20,6 @@ romimage "fallback" option CONFIG_USE_FAILOVER_IMAGE=0 option CONFIG_USE_FALLBACK_IMAGE=1 - option CONFIG_ROM_IMAGE_SIZE=0x20000 option COREBOOT_EXTRA_VERSION=".0-fallback" payload __PAYLOAD__ end Index: targets/gigabyte/m57sli/Config-abuild.lb =================================================================== --- targets/gigabyte/m57sli/Config-abuild.lb (revision 4472) +++ targets/gigabyte/m57sli/Config-abuild.lb (working copy) @@ -13,7 +13,6 @@ romimage "normal" option CONFIG_USE_FAILOVER_IMAGE=0 option CONFIG_USE_FALLBACK_IMAGE=0 - option CONFIG_ROM_IMAGE_SIZE=0x20000 option COREBOOT_EXTRA_VERSION=".0-normal" payload __PAYLOAD__ end @@ -21,7 +20,6 @@ romimage "fallback" option CONFIG_USE_FAILOVER_IMAGE=0 option CONFIG_USE_FALLBACK_IMAGE=1 - option CONFIG_ROM_IMAGE_SIZE=0x20000 option COREBOOT_EXTRA_VERSION=".0-fallback" payload __PAYLOAD__ end Index: targets/gigabyte/ga_2761gxdk/Config-abuild.lb =================================================================== --- targets/gigabyte/ga_2761gxdk/Config-abuild.lb (revision 4472) +++ targets/gigabyte/ga_2761gxdk/Config-abuild.lb (working copy) @@ -34,8 +34,6 @@ romimage "normal" option CONFIG_USE_FAILOVER_IMAGE=0 option CONFIG_USE_FALLBACK_IMAGE=0 - option CONFIG_ROM_IMAGE_SIZE=0x28000 - option CONFIG_XIP_ROM_SIZE=0x40000 option COREBOOT_EXTRA_VERSION=".0-Normal" payload __PAYLOAD__ end @@ -43,8 +41,6 @@ romimage "fallback" option CONFIG_USE_FAILOVER_IMAGE=0 option CONFIG_USE_FALLBACK_IMAGE=1 - option CONFIG_ROM_IMAGE_SIZE=0x20000 - option CONFIG_XIP_ROM_SIZE=0x40000 option COREBOOT_EXTRA_VERSION=".0-Fallback" payload __PAYLOAD__ end Index: targets/digitallogic/msm586seg/Config-abuild.lb =================================================================== --- targets/digitallogic/msm586seg/Config-abuild.lb (revision 4472) +++ targets/digitallogic/msm586seg/Config-abuild.lb (working copy) @@ -9,9 +9,7 @@ __LOGLEVEL__ romimage "fallback" - option CONFIG_FALLBACK_SIZE = 256 * 1024 option CONFIG_USE_FALLBACK_IMAGE=1 - option CONFIG_ROM_IMAGE_SIZE= 128 * 1024 option COREBOOT_EXTRA_VERSION=".0Fallback" payload __PAYLOAD__ end Index: targets/technologic/ts5300/Config-abuild.lb =================================================================== --- targets/technologic/ts5300/Config-abuild.lb (revision 4472) +++ targets/technologic/ts5300/Config-abuild.lb (working copy) @@ -9,9 +9,7 @@ __LOGLEVEL__ romimage "fallback" - option CONFIG_FALLBACK_SIZE = 256 * 1024 option CONFIG_USE_FALLBACK_IMAGE=1 - option CONFIG_ROM_IMAGE_SIZE=128 * 1024 # 0x10000 option COREBOOT_EXTRA_VERSION=".0-Fallback" payload __PAYLOAD__ end Index: targets/amd/rumba/Config.nofallback.lb =================================================================== --- targets/amd/rumba/Config.nofallback.lb (revision 4472) +++ targets/amd/rumba/Config.nofallback.lb (working copy) @@ -5,8 +5,6 @@ mainboard amd/rumba option CONFIG_ROM_SIZE=128*1024 -option CONFIG_FALLBACK_SIZE=CONFIG_ROM_SIZE -#option CONFIG_FALLBACK_SIZE=65535 #romimage "normal" # option CONFIG_USE_FALLBACK_IMAGE=0 Index: targets/amd/serengeti_cheetah/Config-abuild.lb =================================================================== --- targets/amd/serengeti_cheetah/Config-abuild.lb (revision 4472) +++ targets/amd/serengeti_cheetah/Config-abuild.lb (working copy) @@ -13,7 +13,6 @@ romimage "normal" option CONFIG_USE_FAILOVER_IMAGE=0 option CONFIG_USE_FALLBACK_IMAGE=0 - option CONFIG_ROM_IMAGE_SIZE=0x20000 option COREBOOT_EXTRA_VERSION=".0-normal" payload __PAYLOAD__ end @@ -21,7 +20,6 @@ romimage "fallback" option CONFIG_USE_FAILOVER_IMAGE=0 option CONFIG_USE_FALLBACK_IMAGE=1 - option CONFIG_ROM_IMAGE_SIZE=0x20000 option COREBOOT_EXTRA_VERSION=".0-fallback" payload __PAYLOAD__ end Index: targets/amd/serengeti_cheetah/Config-lab.lb =================================================================== --- targets/amd/serengeti_cheetah/Config-lab.lb (revision 4472) +++ targets/amd/serengeti_cheetah/Config-lab.lb (working copy) @@ -13,7 +13,6 @@ romimage "fallback" option CONFIG_PRECOMPRESSED_PAYLOAD=1 option CONFIG_COMPRESSED_PAYLOAD_LZMA=1 - option CONFIG_FALLBACK_SIZE=CONFIG_ROM_SIZE option CONFIG_USE_FALLBACK_IMAGE=1 option CONFIG_ROM_IMAGE_SIZE=0x1a000 option CONFIG_XIP_ROM_SIZE=0x40000 Index: targets/amd/norwich/Config.lb =================================================================== --- targets/amd/norwich/Config.lb (revision 4472) +++ targets/amd/norwich/Config.lb (working copy) @@ -32,7 +32,6 @@ option CONFIG_ROM_SIZE=512*1024-36*1024 #option CONFIG_ROM_SIZE=256*1024-36*1024 -option CONFIG_FALLBACK_SIZE=CONFIG_ROM_SIZE option CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9 option CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9 Index: targets/amd/serengeti_cheetah_fam10/Config-lab.lb =================================================================== --- targets/amd/serengeti_cheetah_fam10/Config-lab.lb (revision 4472) +++ targets/amd/serengeti_cheetah_fam10/Config-lab.lb (working copy) @@ -31,7 +31,6 @@ # 1024KB ROM option CONFIG_ROM_SIZE=1024*1024 -option CONFIG_FALLBACK_SIZE=CONFIG_ROM_SIZE-CONFIG_FAILOVER_SIZE romimage "fallback" option CONFIG_USE_FAILOVER_IMAGE=0 Index: targets/amd/db800/Config.lb =================================================================== --- targets/amd/db800/Config.lb (revision 4472) +++ targets/amd/db800/Config.lb (working copy) @@ -32,7 +32,6 @@ # Leave 36k for VSA. option CONFIG_ROM_SIZE=512*1024-36*1024 # option CONFIG_ROM_SIZE=256*1024-36*1024 -option CONFIG_FALLBACK_SIZE=CONFIG_ROM_SIZE option CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9 option CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9 Index: targets/iei/juki-511p/Config-abuild.lb =================================================================== --- targets/iei/juki-511p/Config-abuild.lb (revision 4472) +++ targets/iei/juki-511p/Config-abuild.lb (working copy) @@ -9,22 +9,15 @@ __LOGLEVEL__ option CONFIG_ROM_SIZE=256*1024 -### -### Compute the location and size of where this firmware image -### (coreboot plus bootloader) will live in the boot rom chip. -### -option CONFIG_FALLBACK_SIZE=128*1024 romimage "normal" option CONFIG_USE_FALLBACK_IMAGE=0 - option CONFIG_ROM_IMAGE_SIZE=64*1024 option COREBOOT_EXTRA_VERSION=".0-Normal" payload __PAYLOAD__ end romimage "fallback" option CONFIG_USE_FALLBACK_IMAGE=1 - option CONFIG_ROM_IMAGE_SIZE=64*1024 option COREBOOT_EXTRA_VERSION=".0-Fallback" payload __PAYLOAD__ end Index: targets/tyan/s2912/Config-abuild.lb =================================================================== --- targets/tyan/s2912/Config-abuild.lb (revision 4472) +++ targets/tyan/s2912/Config-abuild.lb (working copy) @@ -13,7 +13,6 @@ romimage "normal" option CONFIG_USE_FAILOVER_IMAGE=0 option CONFIG_USE_FALLBACK_IMAGE=0 - option CONFIG_ROM_IMAGE_SIZE=0x20000 option COREBOOT_EXTRA_VERSION=".0-normal" payload __PAYLOAD__ end @@ -21,7 +20,6 @@ romimage "fallback" option CONFIG_USE_FAILOVER_IMAGE=0 option CONFIG_USE_FALLBACK_IMAGE=1 - option CONFIG_ROM_IMAGE_SIZE=0x20000 option COREBOOT_EXTRA_VERSION=".0-fallback" payload __PAYLOAD__ end Index: targets/tyan/s2895/Config-abuild.lb =================================================================== --- targets/tyan/s2895/Config-abuild.lb (revision 4472) +++ targets/tyan/s2895/Config-abuild.lb (working copy) @@ -13,7 +13,6 @@ romimage "normal" option CONFIG_USE_FAILOVER_IMAGE=0 option CONFIG_USE_FALLBACK_IMAGE=0 - option CONFIG_ROM_IMAGE_SIZE=0x20000 option COREBOOT_EXTRA_VERSION=".0-normal" payload __PAYLOAD__ end @@ -21,7 +20,6 @@ romimage "fallback" option CONFIG_USE_FAILOVER_IMAGE=0 option CONFIG_USE_FALLBACK_IMAGE=1 - option CONFIG_ROM_IMAGE_SIZE=0x20000 option COREBOOT_EXTRA_VERSION=".0-fallback" payload __PAYLOAD__ end Index: targets/tyan/s2912_fam10/Config-abuild.lb =================================================================== --- targets/tyan/s2912_fam10/Config-abuild.lb (revision 4472) +++ targets/tyan/s2912_fam10/Config-abuild.lb (working copy) @@ -31,8 +31,6 @@ romimage "normal" option CONFIG_USE_FAILOVER_IMAGE=0 option CONFIG_USE_FALLBACK_IMAGE=0 - option CONFIG_ROM_IMAGE_SIZE=0x34000 - option CONFIG_XIP_ROM_SIZE=0x40000 option COREBOOT_EXTRA_VERSION=".0-Normal" payload __PAYLOAD__ end @@ -40,8 +38,6 @@ romimage "fallback" option CONFIG_USE_FAILOVER_IMAGE=0 option CONFIG_USE_FALLBACK_IMAGE=1 - option CONFIG_ROM_IMAGE_SIZE=0x34000 - option CONFIG_XIP_ROM_SIZE=0x40000 option COREBOOT_EXTRA_VERSION=".0-Fallback" payload __PAYLOAD__ end Index: targets/artecgroup/dbe61/Config.lb =================================================================== --- targets/artecgroup/dbe61/Config.lb (revision 4472) +++ targets/artecgroup/dbe61/Config.lb (working copy) @@ -21,8 +21,6 @@ ## not including any payload. option CONFIG_ROM_IMAGE_SIZE=64*1024 -option CONFIG_FALLBACK_SIZE = CONFIG_ROM_SIZE - option CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9 option CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9 romimage "fallback" Index: targets/asi/mb_5blmp/Config.lb =================================================================== --- targets/asi/mb_5blmp/Config.lb (revision 4472) +++ targets/asi/mb_5blmp/Config.lb (working copy) @@ -23,7 +23,6 @@ option CONFIG_ROM_SIZE = (256 * 1024) # option CONFIG_ROM_SIZE = (256 * 1024) - (32 * 1024) -# option CONFIG_FALLBACK_SIZE = (256 * 1024) - (32 * 1024) romimage "normal" option CONFIG_USE_FALLBACK_IMAGE = 0 Index: targets/msi/ms7135/Config-abuild.lb =================================================================== --- targets/msi/ms7135/Config-abuild.lb (revision 4472) +++ targets/msi/ms7135/Config-abuild.lb (working copy) @@ -13,7 +13,6 @@ romimage "normal" option CONFIG_USE_FAILOVER_IMAGE=0 option CONFIG_USE_FALLBACK_IMAGE=0 - option CONFIG_ROM_IMAGE_SIZE=0x20000 option COREBOOT_EXTRA_VERSION=".0-normal" payload __PAYLOAD__ end @@ -21,7 +20,6 @@ romimage "fallback" option CONFIG_USE_FAILOVER_IMAGE=0 option CONFIG_USE_FALLBACK_IMAGE=1 - option CONFIG_ROM_IMAGE_SIZE=0x20000 option COREBOOT_EXTRA_VERSION=".0-fallback" payload __PAYLOAD__ end Index: targets/msi/ms7260/Config-abuild.lb =================================================================== --- targets/msi/ms7260/Config-abuild.lb (revision 4472) +++ targets/msi/ms7260/Config-abuild.lb (working copy) @@ -31,8 +31,6 @@ romimage "normal" option CONFIG_USE_FAILOVER_IMAGE = 0 option CONFIG_USE_FALLBACK_IMAGE = 0 - option CONFIG_ROM_IMAGE_SIZE = 128 * 1024 - option CONFIG_XIP_ROM_SIZE = 256 * 1024 option COREBOOT_EXTRA_VERSION = ".0Normal" payload __PAYLOAD__ end @@ -40,8 +38,6 @@ romimage "fallback" option CONFIG_USE_FAILOVER_IMAGE = 0 option CONFIG_USE_FALLBACK_IMAGE = 1 - option CONFIG_ROM_IMAGE_SIZE = 128 * 1024 - option CONFIG_XIP_ROM_SIZE = 256 * 1024 option COREBOOT_EXTRA_VERSION = ".0Fallback" payload __PAYLOAD__ end Index: targets/arima/hdama/Config.kernelimage.lb =================================================================== --- targets/arima/hdama/Config.kernelimage.lb (revision 4472) +++ targets/arima/hdama/Config.kernelimage.lb (working copy) @@ -13,7 +13,6 @@ uses CONFIG_ROM_PAYLOAD_START uses CONFIG_UDELAY_TSC uses CPU_FIXUP -uses CONFIG_FALLBACK_SIZE uses CONFIG_HAVE_FALLBACK_BOOT uses CONFIG_HAVE_MP_TABLE uses CONFIG_HAVE_PIRQ_TABLE @@ -71,12 +70,6 @@ option CONFIG_ROM_PAYLOAD=1 option CONFIG_HAVE_FALLBACK_BOOT=1 -### -### Compute the location and size of where this firmware image -### (coreboot plus bootloader) will live in the boot rom chip. -### -option CONFIG_FALLBACK_SIZE=CONFIG_ROM_SIZE - ## Coreboot C code runs at this location in RAM option CONFIG_RAMBASE=0x00004000 Index: targets/nvidia/l1_2pvv/Config-abuild.lb =================================================================== --- targets/nvidia/l1_2pvv/Config-abuild.lb (revision 4472) +++ targets/nvidia/l1_2pvv/Config-abuild.lb (working copy) @@ -13,7 +13,6 @@ romimage "normal" option CONFIG_USE_FAILOVER_IMAGE=0 option CONFIG_USE_FALLBACK_IMAGE=0 - option CONFIG_ROM_IMAGE_SIZE=0x20000 option COREBOOT_EXTRA_VERSION=".0-normal" payload __PAYLOAD__ end @@ -21,7 +20,6 @@ romimage "fallback" option CONFIG_USE_FAILOVER_IMAGE=0 option CONFIG_USE_FALLBACK_IMAGE=1 - option CONFIG_ROM_IMAGE_SIZE=0x20000 option COREBOOT_EXTRA_VERSION=".0-fallback" payload __PAYLOAD__ end Index: targets/asus/a8n_e/Config-abuild.lb =================================================================== --- targets/asus/a8n_e/Config-abuild.lb (revision 4472) +++ targets/asus/a8n_e/Config-abuild.lb (working copy) @@ -13,7 +13,6 @@ romimage "normal" option CONFIG_USE_FAILOVER_IMAGE=0 option CONFIG_USE_FALLBACK_IMAGE=0 - option CONFIG_ROM_IMAGE_SIZE=0x20000 option COREBOOT_EXTRA_VERSION=".0-normal" payload __PAYLOAD__ end @@ -21,7 +20,6 @@ romimage "fallback" option CONFIG_USE_FAILOVER_IMAGE=0 option CONFIG_USE_FALLBACK_IMAGE=1 - option CONFIG_ROM_IMAGE_SIZE=0x20000 option COREBOOT_EXTRA_VERSION=".0-fallback" payload __PAYLOAD__ end Index: targets/asus/m2v-mx_se/Config-abuild.lb =================================================================== --- targets/asus/m2v-mx_se/Config-abuild.lb (revision 4472) +++ targets/asus/m2v-mx_se/Config-abuild.lb (working copy) @@ -35,15 +35,6 @@ ## CONFIG_ROM_IMAGE_SIZE is the maximum number of bytes allowed for a coreboot image, ## not including any payload. -# Please note that 128KB is cached for (XIP) too - -option CONFIG_ROM_IMAGE_SIZE = 128 * 1024 - -## CONFIG_FALLBACK_SIZE is the amount of the ROM the complete fallback image -## (including payload) will use. - -option CONFIG_FALLBACK_SIZE = CONFIG_ROM_SIZE - romimage "fallback" option CONFIG_USE_FALLBACK_IMAGE=1 payload __PAYLOAD__ Index: targets/asus/m2v-mx_se/Config.lb =================================================================== --- targets/asus/m2v-mx_se/Config.lb (revision 4472) +++ targets/asus/m2v-mx_se/Config.lb (working copy) @@ -41,11 +41,6 @@ option CONFIG_ROM_IMAGE_SIZE = 128 * 1024 -## CONFIG_FALLBACK_SIZE is the amount of the ROM the complete fallback image -## (including payload) will use. - -option CONFIG_FALLBACK_SIZE = CONFIG_ROM_SIZE - romimage "fallback" option CONFIG_USE_FALLBACK_IMAGE=1 payload ../payload.elf