===================================================================
@@ -51,12 +51,3 @@
ldscripts += $(src)/southbridge/nvidia/ck804/romstrap.lds
ldscripts += $(src)/arch/i386/lib/failover.lds
-ifdef POST_EVALUATION
-
-$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/option_table.h
- $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/romstage.c -o $@
- perl -e 's/\.rodata/.rom.data/g' -pi $@
- perl -e 's/\.text/.section .rom.text/g' -pi $@
-
-endif
-
===================================================================
@@ -50,12 +50,3 @@
ldscripts += $(src)/arch/i386/lib/id.lds
ldscripts += $(src)/arch/i386/lib/failover.lds
-ifdef POST_EVALUATION
-
-$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/option_table.h
- $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/romstage.c -o $@
- perl -e 's/\.rodata/.rom.data/g' -pi $@
- perl -e 's/\.text/.section .rom.text/g' -pi $@
-
-endif
-
===================================================================
@@ -25,6 +25,7 @@
select NORTHBRIDGE_AMD_GX1
select SOUTHBRIDGE_AMD_CS5530
select SUPERIO_NSC_PC97317
+ select ROMCC
select HAVE_PIRQ_TABLE
select PIRQ_ROUTE
select UDELAY_TSC
===================================================================
@@ -42,12 +42,3 @@
crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc
crt0s += $(src)/cpu/x86/mmx_disable.inc
-ifdef POST_EVALUATION
-
-$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/option_table.h
- $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/romstage.c -o $@
- perl -e 's/\.rodata/.rom.data/g' -pi $@
- perl -e 's/\.text/.section .rom.text/g' -pi $@
-
-endif
-
===================================================================
@@ -25,6 +25,7 @@
select NORTHBRIDGE_AMD_GX1
select SOUTHBRIDGE_AMD_CS5530
select SUPERIO_NSC_PC97317
+ select ROMCC
select HAVE_PIRQ_TABLE
select PIRQ_ROUTE
select UDELAY_TSC
===================================================================
@@ -25,6 +25,7 @@
select NORTHBRIDGE_AMD_GX1
select SOUTHBRIDGE_AMD_CS5530
select SUPERIO_NSC_PC97317
+ select ROMCC
select HAVE_PIRQ_TABLE
select PIRQ_ROUTE
select UDELAY_TSC
===================================================================
@@ -5,6 +5,7 @@
select NORTHBRIDGE_INTEL_I82830
select SOUTHBRIDGE_INTEL_I82801XX
select SUPERIO_SMSC_SMSCSUPERIO
+ select ROMCC
select HAVE_PIRQ_TABLE
select UDELAY_TSC
select BOARD_ROMSIZE_KB_512
===================================================================
@@ -5,6 +5,7 @@
select NORTHBRIDGE_INTEL_E7525
select SOUTHBRIDGE_INTEL_ESB6300
select SUPERIO_WINBOND_W83627HF
+ select ROMCC
select HAVE_PIRQ_TABLE
select HAVE_MP_TABLE
select BOARD_ROMSIZE_KB_1024
===================================================================
@@ -45,12 +45,3 @@
ldscripts += $(src)/southbridge/nvidia/mcp55/romstrap.lds
ldscripts += $(src)/arch/i386/lib/failover.lds
-ifdef POST_EVALUATION
-
-$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/option_table.h
- $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/romstage.c -o $@
- perl -e 's/\.rodata/.rom.data/g' -pi $@
- perl -e 's/\.text/.section .rom.text/g' -pi $@
-
-endif
-
===================================================================
@@ -6,6 +6,7 @@
select SOUTHBRIDGE_INTEL_ESB6300
select SOUTHBRIDGE_INTEL_PXHD
select SUPERIO_WINBOND_W83627HF
+ select ROMCC
select HAVE_PIRQ_TABLE
select HAVE_MP_TABLE
select BOARD_ROMSIZE_KB_1024
===================================================================
@@ -46,12 +46,3 @@
ldscripts += $(src)/southbridge/nvidia/mcp55/romstrap.lds
ldscripts += $(src)/arch/i386/lib/failover.lds
-ifdef POST_EVALUATION
-
-$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/option_table.h
- $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/romstage.c -o $@
- perl -e 's/\.rodata/.rom.data/g' -pi $@
- perl -e 's/\.text/.section .rom.text/g' -pi $@
-
-endif
-
===================================================================
@@ -38,12 +38,3 @@
ldscripts += $(src)/cpu/x86/32bit/entry32.lds
ldscripts += $(src)/arch/i386/lib/failover.lds
-ifdef POST_EVALUATION
-
-$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/option_table.h
- $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/romstage.c -o $@
- perl -e 's/\.rodata/.rom.data/g' -pi $@
- perl -e 's/\.text/.section .rom.text/g' -pi $@
-
-endif
-
===================================================================
@@ -6,6 +6,7 @@
select SOUTHBRIDGE_INTEL_I82801ER
select SOUTHBRIDGE_INTEL_PXHD
select SUPERIO_NSC_PC87427
+ select ROMCC
select HAVE_PIRQ_TABLE
select HAVE_MP_TABLE
select BOARD_ROMSIZE_KB_1024
===================================================================
@@ -38,12 +38,3 @@
ldscripts += $(src)/cpu/x86/32bit/entry32.lds
ldscripts += $(src)/arch/i386/lib/failover.lds
-ifdef POST_EVALUATION
-
-$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/option_table.h
- $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/romstage.c -o $@
- perl -e 's/\.rodata/.rom.data/g' -pi $@
- perl -e 's/\.text/.section .rom.text/g' -pi $@
-
-endif
-
===================================================================
@@ -6,6 +6,7 @@
select SOUTHBRIDGE_INTEL_I82801ER
select SOUTHBRIDGE_INTEL_PXHD
select SUPERIO_WINBOND_W83627HF
+ select ROMCC
select HAVE_PIRQ_TABLE
select HAVE_MP_TABLE
select BOARD_ROMSIZE_KB_1024
===================================================================
@@ -6,6 +6,7 @@
select SOUTHBRIDGE_INTEL_I82801ER
select SOUTHBRIDGE_INTEL_PXHD
select SUPERIO_WINBOND_W83627HF
+ select ROMCC
select HAVE_PIRQ_TABLE
select HAVE_MP_TABLE
select BOARD_ROMSIZE_KB_1024
===================================================================
@@ -25,6 +25,7 @@
select NORTHBRIDGE_INTEL_I440BX
select SOUTHBRIDGE_INTEL_I82371EB
select SUPERIO_ITE_IT8671F
+ select ROMCC
select HAVE_PIRQ_TABLE
select UDELAY_TSC
select BOARD_ROMSIZE_KB_256
===================================================================
@@ -45,12 +45,3 @@
ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb
ldscripts += $(src)/cpu/x86/32bit/entry32.lds
-ifdef POST_EVALUATION
-
-$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/option_table.h
- $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/romstage.c -o $@
- perl -e 's/\.rodata/.rom.data/g' -pi $@
- perl -e 's/\.text/.section .rom.text/g' -pi $@
-
-endif
-
===================================================================
@@ -46,12 +46,3 @@
ldscripts += $(src)/arch/i386/lib/id.lds
ldscripts += $(src)/arch/i386/lib/failover.lds
-ifdef POST_EVALUATION
-
-$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/option_table.h
- $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/romstage.c -o $@
- perl -e 's/\.rodata/.rom.data/g' -pi $@
- perl -e 's/\.text/.section .rom.text/g' -pi $@
-
-endif
-
===================================================================
@@ -25,6 +25,7 @@
select NORTHBRIDGE_INTEL_I440BX
select SOUTHBRIDGE_INTEL_I82371EB
select SUPERIO_WINBOND_W83627HF
+ select ROMCC
select HAVE_PIRQ_TABLE
select UDELAY_TSC
select BOARD_ROMSIZE_KB_256
===================================================================
@@ -25,6 +25,7 @@
select NORTHBRIDGE_INTEL_I440BX
select SOUTHBRIDGE_INTEL_I82371EB
select SUPERIO_WINBOND_W83977TF
+ select ROMCC
select HAVE_PIRQ_TABLE
select UDELAY_TSC
select BOARD_ROMSIZE_KB_256
===================================================================
@@ -56,9 +56,4 @@
$(obj)/mainboard/$(MAINBOARDDIR)/ap_romstage.o: $(src)/mainboard/$(MAINBOARDDIR)/ap_romstage.c $(obj)/option_table.h
$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/ap_romstage.c -o $@
-$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/option_table.h
- $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/romstage.c -o $@
- perl -e 's/\.rodata/.rom.data/g' -pi $@
- perl -e 's/\.text/.section .rom.text/g' -pi $@
-
endif
===================================================================
@@ -51,9 +51,4 @@
$(obj)/mainboard/$(MAINBOARDDIR)/ap_romstage.o: $(src)/mainboard/$(MAINBOARDDIR)/ap_romstage.c $(obj)/option_table.h
$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/ap_romstage.c -o $@
-$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/option_table.h
- $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/romstage.c -o $@
- perl -e 's/\.rodata/.rom.data/g' -pi $@
- perl -e 's/\.text/.section .rom.text/g' -pi $@
-
endif
===================================================================
@@ -25,6 +25,7 @@
select NORTHBRIDGE_INTEL_I440BX
select SOUTHBRIDGE_INTEL_I82371EB
select SUPERIO_ITE_IT8671F
+ select ROMCC
select HAVE_PIRQ_TABLE
select UDELAY_TSC
select BOARD_ROMSIZE_KB_256
===================================================================
@@ -20,12 +20,3 @@
ldscripts += $(src)/arch/i386/lib/id.lds
ldscripts += $(src)/arch/i386/lib/failover.lds
-ifdef POST_EVALUATION
-
-$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/build.h
- $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/romstage.c -o $@
- perl -e 's/\.rodata/.rom.data/g' -pi $@
- perl -e 's/\.text/.section .rom.text/g' -pi $@
-
-endif
-
===================================================================
@@ -5,6 +5,7 @@
select NORTHBRIDGE_INTEL_I855PM
select SOUTHBRIDGE_INTEL_I82801DBM
select SUPERIO_WINBOND_W83627HF
+ select ROMCC
select HAVE_PIRQ_TABLE
select BOARD_ROMSIZE_KB_1024
===================================================================
@@ -4,6 +4,7 @@
select CPU_AMD_SC520
select HAVE_PIRQ_TABLE
select BOARD_ROMSIZE_KB_512
+ select ROMCC
config MAINBOARD_DIR
string
===================================================================
@@ -4,6 +4,7 @@
select CPU_AMD_GX2
select NORTHBRIDGE_AMD_GX2
select SOUTHBRIDGE_AMD_CS5536
+ select ROMCC
select UDELAY_TSC
select HAVE_PIRQ_TABLE
select BOARD_ROMSIZE_KB_256
===================================================================
@@ -4,6 +4,7 @@
select CPU_AMD_GX2
select NORTHBRIDGE_AMD_GX2
select SOUTHBRIDGE_AMD_CS5536
+ select ROMCC
select UDELAY_TSC
select HAVE_PIRQ_TABLE
select BOARD_ROMSIZE_KB_256
===================================================================
@@ -25,6 +25,7 @@
select NORTHBRIDGE_INTEL_I82810
select SOUTHBRIDGE_INTEL_I82801XX
select SUPERIO_SMSC_SMSCSUPERIO
+ select ROMCC
select HAVE_PIRQ_TABLE
select UDELAY_TSC
select BOARD_ROMSIZE_KB_512
===================================================================
@@ -3,6 +3,7 @@
select ARCH_X86
select SOUTHBRIDGE_INTEL_I82371EB
select CPU_EMULATION_QEMU_X86
+ select ROMCC
select HAVE_PIRQ_TABLE
select BOARD_ROMSIZE_KB_256
select WARNINGS_ARE_ERRORS
===================================================================
@@ -2,6 +2,7 @@
bool "TS-5300"
select ARCH_X86
select CPU_AMD_SC520
+ select ROMCC
select HAVE_PIRQ_TABLE
select BOARD_ROMSIZE_KB_128
===================================================================
@@ -46,12 +46,3 @@
ldscripts += $(src)/arch/i386/lib/id.lds
ldscripts += $(src)/arch/i386/lib/failover.lds
-ifdef POST_EVALUATION
-
-$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/option_table.h
- $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/romstage.c -o $@
- perl -e 's/\.rodata/.rom.data/g' -pi $@
- perl -e 's/\.text/.section .rom.text/g' -pi $@
-
-endif
-
===================================================================
@@ -46,12 +46,3 @@
ldscripts += $(src)/arch/i386/lib/id.lds
ldscripts += $(src)/arch/i386/lib/failover.lds
-ifdef POST_EVALUATION
-
-$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/option_table.h
- $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/romstage.c -o $@
- perl -e 's/\.rodata/.rom.data/g' -pi $@
- perl -e 's/\.text/.section .rom.text/g' -pi $@
-
-endif
-
===================================================================
@@ -24,6 +24,7 @@
select CPU_AMD_GX2
select NORTHBRIDGE_AMD_GX2
select SOUTHBRIDGE_AMD_CS5536
+ select ROMCC
select UDELAY_TSC
select HAVE_PIRQ_TABLE
select BOARD_ROMSIZE_KB_256
===================================================================
@@ -51,12 +51,3 @@
ldscripts += $(src)/arch/i386/lib/id.lds
ldscripts += $(src)/arch/i386/lib/failover.lds
-ifdef POST_EVALUATION
-
-$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/option_table.h
- $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/romstage.c -o $@
- perl -e 's/\.rodata/.rom.data/g' -pi $@
- perl -e 's/\.text/.section .rom.text/g' -pi $@
-
-endif
-
===================================================================
@@ -20,12 +20,3 @@
ldscripts += $(src)/arch/i386/lib/id.lds
ldscripts += $(src)/arch/i386/lib/failover.lds
-ifdef POST_EVALUATION
-
-$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/build.h
- $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/romstage.c -o $@
- perl -e 's/\.rodata/.rom.data/g' -pi $@
- perl -e 's/\.text/.section .rom.text/g' -pi $@
-
-endif
-
===================================================================
@@ -49,13 +49,3 @@
ldscripts += $(src)/cpu/x86/32bit/entry32.lds
ldscripts += $(src)/arch/i386/lib/failover.lds
-ifdef POST_EVALUATION
-
-$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/option_table.h
- $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/romstage.c -o $@
- perl -e 's/\.rodata/.rom.data/g' -pi $@
- perl -e 's/\.text/.section .rom.text/g' -pi $@
-
-
-endif
-
===================================================================
@@ -19,12 +19,3 @@
ldscripts += $(src)/arch/i386/lib/id.lds
ldscripts += $(src)/arch/i386/lib/failover.lds
-ifdef POST_EVALUATION
-
-$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/build.h
- $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/romstage.c -o $@
- perl -e 's/\.rodata/.rom.data/g' -pi $@
- perl -e 's/\.text/.section .rom.text/g' -pi $@
-
-endif
-
===================================================================
@@ -25,6 +25,7 @@
select NORTHBRIDGE_INTEL_I440BX
select SOUTHBRIDGE_INTEL_I82371EB
select SUPERIO_SMSC_SMSCSUPERIO
+ select ROMCC
select HAVE_PIRQ_TABLE
select UDELAY_TSC
select BOARD_ROMSIZE_KB_256
===================================================================
@@ -25,6 +25,7 @@
select NORTHBRIDGE_INTEL_I440BX
select SOUTHBRIDGE_INTEL_I82371EB
select SUPERIO_WINBOND_W83977TF
+ select ROMCC
select HAVE_PIRQ_TABLE
select UDELAY_TSC
select BOARD_ROMSIZE_KB_256
===================================================================
@@ -25,6 +25,7 @@
select NORTHBRIDGE_INTEL_I82810
select SOUTHBRIDGE_INTEL_I82801XX
select SUPERIO_SMSC_SMSCSUPERIO
+ select ROMCC
select HAVE_PIRQ_TABLE
select UDELAY_TSC
select BOARD_ROMSIZE_KB_512
===================================================================
@@ -5,6 +5,7 @@
select NORTHBRIDGE_INTEL_I82830
select SOUTHBRIDGE_INTEL_I82801XX
select SUPERIO_SMSC_SMSCSUPERIO
+ select ROMCC
select HAVE_PIRQ_TABLE
select UDELAY_TSC
select BOARD_ROMSIZE_KB_512
===================================================================
@@ -25,6 +25,7 @@
select NORTHBRIDGE_AMD_GX1
select SOUTHBRIDGE_AMD_CS5530
select SUPERIO_WINBOND_W83977TF
+ select ROMCC
select HAVE_PIRQ_TABLE
select PIRQ_ROUTE
select HAVE_OPTION_TABLE
===================================================================
@@ -20,12 +20,3 @@
ldscripts += $(src)/arch/i386/lib/id.lds
ldscripts += $(src)/arch/i386/lib/failover.lds
-ifdef POST_EVALUATION
-
-$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/build.h
- $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/romstage.c -o $@
- perl -e 's/\.rodata/.rom.data/g' -pi $@
- perl -e 's/\.text/.section .rom.text/g' -pi $@
-
-endif
-
===================================================================
@@ -25,6 +25,7 @@
select NORTHBRIDGE_AMD_GX1
select SOUTHBRIDGE_AMD_CS5530
select SUPERIO_WINBOND_W83977F
+ select ROMCC
select PIRQ_ROUTE
select HAVE_OPTION_TABLE
select BOARD_ROMSIZE_KB_256
===================================================================
@@ -28,6 +28,7 @@
select NORTHBRIDGE_INTEL_I82810
select SOUTHBRIDGE_INTEL_I82801XX
select SUPERIO_NSC_PC87360
+ select ROMCC
select HAVE_PIRQ_TABLE
select UDELAY_TSC
select BOARD_ROMSIZE_KB_512
===================================================================
@@ -20,12 +20,3 @@
ldscripts += $(src)/arch/i386/lib/id.lds
ldscripts += $(src)/arch/i386/lib/failover.lds
-ifdef POST_EVALUATION
-
-$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/option_table.h
- $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/romstage.c -o $@
- perl -e 's/\.rodata/.rom.data/g' -pi $@
- perl -e 's/\.text/.section .rom.text/g' -pi $@
-
-endif
-
===================================================================
@@ -20,12 +20,3 @@
ldscripts += $(src)/arch/i386/lib/id.lds
ldscripts += $(src)/arch/i386/lib/failover.lds
-ifdef POST_EVALUATION
-
-$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/option_table.h
- $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/romstage.c -o $@
- perl -e 's/\.rodata/.rom.data/g' -pi $@
- perl -e 's/\.text/.section .rom.text/g' -pi $@
-
-endif
-
===================================================================
@@ -53,9 +53,4 @@
$(obj)/mainboard/$(MAINBOARDDIR)/ap_romstage.o: $(src)/mainboard/$(MAINBOARDDIR)/ap_romstage.c $(obj)/option_table.h
$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/ap_romstage.c -o $@
-$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/option_table.h
- $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/romstage.c -o $@
- perl -e 's/\.rodata/.rom.data/g' -pi $@
- perl -e 's/\.text/.section .rom.text/g' -pi $@
-
endif
===================================================================
@@ -49,12 +49,3 @@
ldscripts += $(src)/arch/i386/lib/failover.lds
ldscripts += $(src)/cpu/x86/car/cache_as_ram.lds
-ifdef POST_EVALUATION
-
-$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/option_table.h
- $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/romstage.c -o $@
- perl -e 's/\.rodata/.rom.data/g' -pi $@
- perl -e 's/\.text/.section .rom.text/g' -pi $@
-
-endif
-
===================================================================
@@ -25,6 +25,7 @@
select NORTHBRIDGE_INTEL_I440BX
select SOUTHBRIDGE_INTEL_I82371EB
select SUPERIO_NSC_PC87309
+ select ROMCC
select UDELAY_TSC
select BOARD_ROMSIZE_KB_256
===================================================================
@@ -46,9 +46,4 @@
$(obj)/mainboard/$(MAINBOARDDIR)/ap_romstage.o: $(src)/mainboard/$(MAINBOARDDIR)/ap_romstage.c $(obj)/option_table.h
$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/ap_romstage.c -o $@
-$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/option_table.h
- $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/romstage.c -o $@
- perl -e 's/\.rodata/.rom.data/g' -pi $@
- perl -e 's/\.text/.section .rom.text/g' -pi $@
-
endif
===================================================================
@@ -25,6 +25,7 @@
select NORTHBRIDGE_AMD_GX1
select SOUTHBRIDGE_AMD_CS5530
select SUPERIO_NSC_PC87351
+ select ROMCC
select HAVE_PIRQ_TABLE
select PIRQ_ROUTE
select UDELAY_TSC
===================================================================
@@ -25,6 +25,7 @@
select NORTHBRIDGE_AMD_GX1
select SOUTHBRIDGE_AMD_CS5530
select SUPERIO_NSC_PC87351
+ select ROMCC
select HAVE_PIRQ_TABLE
select PIRQ_ROUTE
select UDELAY_TSC
===================================================================
@@ -20,12 +20,3 @@
ldscripts += $(src)/arch/i386/lib/id.lds
ldscripts += $(src)/arch/i386/lib/failover.lds
-ifdef POST_EVALUATION
-
-$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/build.h
- $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/romstage.c -o $@
- perl -e 's/\.rodata/.rom.data/g' -pi $@
- perl -e 's/\.text/.section .rom.text/g' -pi $@
-
-endif
-
===================================================================
@@ -4,6 +4,7 @@
select CPU_AMD_GX2
select NORTHBRIDGE_AMD_GX2
select SOUTHBRIDGE_AMD_CS5535
+ select ROMCC
select UDELAY_TSC
select HAVE_PIRQ_TABLE
select BOARD_ROMSIZE_KB_256
===================================================================
@@ -20,12 +20,3 @@
ldscripts += $(src)/arch/i386/lib/id.lds
ldscripts += $(src)/arch/i386/lib/failover.lds
-ifdef POST_EVALUATION
-
-$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/build.h
- $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/romstage.c -o $@
- perl -e 's/\.rodata/.rom.data/g' -pi $@
- perl -e 's/\.text/.section .rom.text/g' -pi $@
-
-endif
-
===================================================================
@@ -25,6 +25,7 @@
select NORTHBRIDGE_INTEL_I440BX
select SOUTHBRIDGE_INTEL_I82371EB
select SUPERIO_WINBOND_W83977TF
+ select ROMCC
select HAVE_PIRQ_TABLE
select UDELAY_TSC
select BOARD_ROMSIZE_KB_256
===================================================================
@@ -44,15 +44,3 @@
crt0s += $(src)/cpu/via/car/cache_as_ram.inc
crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc
-ifdef POST_EVALUATION
-
-$(obj)/mainboard/$(MAINBOARDDIR)/dsdt.o: $(src)/mainboard/$(MAINBOARDDIR)/dsdt.c
- $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c $< -o $@
-
-$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/option_table.h
- $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/romstage.c -o $@
- perl -e 's/\.rodata/.rom.data/g' -pi $@
- perl -e 's/\.text/.section .rom.text/g' -pi $@
-
-endif
-
===================================================================
@@ -40,12 +40,3 @@
ldscripts += $(src)/arch/i386/lib/id.lds
ldscripts += $(src)/arch/i386/lib/failover.lds
-ifdef POST_EVALUATION
-
-$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/option_table.h
- $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/romstage.c -o $@
- perl -e 's/\.rodata/.rom.data/g' -pi $@
- perl -e 's/\.text/.section .rom.text/g' -pi $@
-
-endif
-
===================================================================
@@ -44,12 +44,3 @@
crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc
crt0s += $(src)/cpu/x86/mmx_disable.inc
-ifdef POST_EVALUATION
-
-$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/option_table.h
- $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/romstage.c -o $@
- perl -e 's/\.rodata/.rom.data/g' -pi $@
- perl -e 's/\.text/.section .rom.text/g' -pi $@
-
-endif
-
===================================================================
@@ -41,12 +41,3 @@
crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc
crt0s += $(src)/cpu/x86/mmx_disable.inc
-ifdef POST_EVALUATION
-
-$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/option_table.h
- $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/romstage.c -o $@
- perl -e 's/\.rodata/.rom.data/g' -pi $@
- perl -e 's/\.text/.section .rom.text/g' -pi $@
-
-endif
-
===================================================================
@@ -5,6 +5,7 @@
select NORTHBRIDGE_VIA_CN700
select SOUTHBRIDGE_VIA_VT8237R
select SUPERIO_VIA_VT1211
+ select ROMCC
select HAVE_PIRQ_TABLE
select BOARD_ROMSIZE_KB_512
===================================================================
@@ -37,12 +37,3 @@
crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc
crt0s += $(src)/cpu/x86/mmx_disable.inc
-ifdef POST_EVALUATION
-
-$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/option_table.h
- $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/romstage.c -o $@
- perl -e 's/\.rodata/.rom.data/g' -pi $@
- perl -e 's/\.text/.section .rom.text/g' -pi $@
-
-endif
-
===================================================================
@@ -5,6 +5,7 @@
select NORTHBRIDGE_VIA_CN700
select SOUTHBRIDGE_VIA_VT8237R
select SUPERIO_ITE_IT8716F
+ select ROMCC
select HAVE_PIRQ_TABLE
select HAVE_MP_TABLE
select SMP
===================================================================
@@ -6,6 +6,7 @@
select SOUTHBRIDGE_INTEL_I82801ER
select SOUTHBRIDGE_INTEL_PXHD
select SUPERIO_NSC_PC8374
+ select ROMCC
select HAVE_PIRQ_TABLE
select HAVE_MP_TABLE
select BOARD_ROMSIZE_KB_1024
===================================================================
@@ -26,6 +26,7 @@
select SOUTHBRIDGE_INTEL_I82371EB
# should be SUPERIO_NSC_PC97307!
select SUPERIO_NSC_PC97317
+ select ROMCC
select HAVE_PIRQ_TABLE
select UDELAY_TSC
select BOARD_ROMSIZE_KB_256
===================================================================
@@ -53,12 +53,3 @@
ldscripts += $(src)/arch/i386/lib/id.lds
ldscripts += $(src)/arch/i386/lib/failover.lds
-ifdef POST_EVALUATION
-
-$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/option_table.h
- $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/romstage.c -o $@
- perl -e 's/\.rodata/.rom.data/g' -pi $@
- perl -e 's/\.text/.section .rom.text/g' -pi $@
-
-endif
-
===================================================================
@@ -25,6 +25,7 @@
select NORTHBRIDGE_INTEL_I440BX
select SOUTHBRIDGE_INTEL_I82371EB
select SUPERIO_WINBOND_W83977TF
+ select ROMCC
select HAVE_PIRQ_TABLE
select UDELAY_TSC
select BOARD_ROMSIZE_KB_256
===================================================================
@@ -25,6 +25,7 @@
select NORTHBRIDGE_INTEL_I440BX
select SOUTHBRIDGE_INTEL_I82371EB
select SUPERIO_WINBOND_W83977TF
+ select ROMCC
select HAVE_PIRQ_TABLE
select UDELAY_TSC
select BOARD_ROMSIZE_KB_256
===================================================================
@@ -25,6 +25,7 @@
select NORTHBRIDGE_INTEL_I440BX
select SOUTHBRIDGE_INTEL_I82371EB
select SUPERIO_WINBOND_W83977TF
+ select ROMCC
select HAVE_PIRQ_TABLE
select UDELAY_TSC
select BOARD_ROMSIZE_KB_256
===================================================================
@@ -53,9 +53,4 @@
$(obj)/mainboard/$(MAINBOARDDIR)/ap_romstage.o: $(src)/mainboard/$(MAINBOARDDIR)/ap_romstage.c $(obj)/option_table.h
$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/ap_romstage.c -o $@
-$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/option_table.h
- $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/romstage.c -o $@
- perl -e 's/\.rodata/.rom.data/g' -pi $@
- perl -e 's/\.text/.section .rom.text/g' -pi $@
-
endif
===================================================================
@@ -25,6 +25,7 @@
select NORTHBRIDGE_INTEL_I82810
select SOUTHBRIDGE_INTEL_I82801XX
select SUPERIO_WINBOND_W83627HF
+ select ROMCC
select HAVE_PIRQ_TABLE
select BOARD_ROMSIZE_KB_512
===================================================================
@@ -51,9 +51,4 @@
$(obj)/mainboard/$(MAINBOARDDIR)/ap_romstage.o: $(src)/mainboard/$(MAINBOARDDIR)/ap_romstage.c $(obj)/option_table.h
$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/ap_romstage.c -o $@
-$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/option_table.h
- $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/romstage.c -o $@
- perl -e 's/\.rodata/.rom.data/g' -pi $@
- perl -e 's/\.text/.section .rom.text/g' -pi $@
-
endif
===================================================================
@@ -46,12 +46,3 @@
ldscripts += $(src)/arch/i386/lib/id.lds
ldscripts += $(src)/arch/i386/lib/failover.lds
-ifdef POST_EVALUATION
-
-$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/option_table.h
- $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/romstage.c -o $@
- perl -e 's/\.rodata/.rom.data/g' -pi $@
- perl -e 's/\.text/.section .rom.text/g' -pi $@
-
-endif
-
===================================================================
@@ -25,6 +25,7 @@
select NORTHBRIDGE_AMD_GX1
select SOUTHBRIDGE_AMD_CS5530
select SUPERIO_WINBOND_W83977F
+ select ROMCC
select HAVE_PIRQ_TABLE
select PIRQ_ROUTE
select UDELAY_TSC
===================================================================
@@ -25,6 +25,7 @@
select NORTHBRIDGE_AMD_GX1
select SOUTHBRIDGE_AMD_CS5530
select SUPERIO_NSC_PC97317
+ select ROMCC
select HAVE_PIRQ_TABLE
select PIRQ_ROUTE
select UDELAY_TSC
===================================================================
@@ -67,20 +67,3 @@
obj-$(CONFIG_GENERATE_PIRQ_TABLE) += irq_tables.o
obj-$(CONFIG_HAVE_HARD_RESET) += reset.o
-ifdef POST_EVALUATION
-
-ROMCCFLAGS ?= -mcpu=p2 -O2
-
-$(obj)/mainboard/$(MAINBOARDDIR)/failover.inc: $(obj)/romcc $(src)/arch/i386/lib/failover.c
- $(obj)/romcc $(ROMCCFLAGS) --label-prefix=failover $(INCLUDES) $(src)/arch/i386/lib/failover.c -o $@
-
-ifeq ($(CONFIG_HAVE_OPTION_TABLE),y)
-$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(obj)/romcc $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/option_table.h $(obj)/build.h
- $(obj)/romcc $(ROMCCFLAGS) $(INCLUDES) $(src)/mainboard/$(MAINBOARDDIR)/romstage.c -o $@
-else
-$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(obj)/romcc $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/build.h
- $(obj)/romcc $(ROMCCFLAGS) $(INCLUDES) $(src)/mainboard/$(MAINBOARDDIR)/romstage.c -o $@
-endif
-
-endif
-
===================================================================
@@ -38,12 +38,3 @@
crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc
crt0s += $(src)/cpu/x86/mmx_disable.inc
-ifdef POST_EVALUATION
-
-$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/option_table.h
- $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/romstage.c -o $@
- perl -e 's/\.rodata/.rom.data/g' -pi $@
- perl -e 's/\.text/.section .rom.text/g' -pi $@
-
-endif
-
===================================================================
@@ -46,12 +46,3 @@
ldscripts += $(src)/arch/i386/lib/id.lds
ldscripts += $(src)/arch/i386/lib/failover.lds
-ifdef POST_EVALUATION
-
-$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/option_table.h
- $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/romstage.c -o $@
- perl -e 's/\.rodata/.rom.data/g' -pi $@
- perl -e 's/\.text/.section .rom.text/g' -pi $@
-
-endif
-
===================================================================
@@ -52,12 +52,3 @@
ldscripts += $(src)/arch/i386/lib/id.lds
ldscripts += $(src)/arch/i386/lib/failover.lds
-ifdef POST_EVALUATION
-
-$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/option_table.h
- $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/romstage.c -o $@
- perl -e 's/\.rodata/.rom.data/g' -pi $@
- perl -e 's/\.text/.section .rom.text/g' -pi $@
-
-endif
-
===================================================================
@@ -53,9 +53,4 @@
$(obj)/mainboard/$(MAINBOARDDIR)/ap_romstage.o: $(src)/mainboard/$(MAINBOARDDIR)/ap_romstage.c $(obj)/option_table.h
$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/ap_romstage.c -o $@
-$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/option_table.h
- $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/romstage.c -o $@
- perl -e 's/\.rodata/.rom.data/g' -pi $@
- perl -e 's/\.text/.section .rom.text/g' -pi $@
-
endif
===================================================================
@@ -6,6 +6,7 @@
select SOUTHBRIDGE_INTEL_I82870
select SOUTHBRIDGE_INTEL_I82801CA
select SUPERIO_SMSC_LPC47B272
+ select ROMCC
select HAVE_PIRQ_TABLE
select HAVE_MP_TABLE
select UDELAY_TSC
===================================================================
@@ -49,12 +49,3 @@
ldscripts += $(src)/arch/i386/lib/id.lds
ldscripts += $(src)/arch/i386/lib/failover.lds
-ifdef POST_EVALUATION
-
-$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/option_table.h
- $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/romstage.c -o $@
- perl -e 's/\.rodata/.rom.data/g' -pi $@
- perl -e 's/\.text/.section .rom.text/g' -pi $@
-
-endif
-
===================================================================
@@ -6,6 +6,7 @@
select SOUTHBRIDGE_INTEL_I3100
select SUPERIO_INTEL_I3100
select SUPERIO_SMSC_SMSCSUPERIO
+ select ROMCC
select HAVE_PIRQ_TABLE
select HAVE_MP_TABLE
select UDELAY_TSC
===================================================================
@@ -5,6 +5,7 @@
select NORTHBRIDGE_INTEL_I3100
select SOUTHBRIDGE_INTEL_I3100
select SUPERIO_INTEL_I3100
+ select ROMCC
select HAVE_PIRQ_TABLE
select HAVE_MP_TABLE
select UDELAY_TSC
===================================================================
@@ -24,12 +24,3 @@
ldscripts += $(src)/arch/i386/lib/id.lds
ldscripts += $(src)/arch/i386/lib/failover.lds
-ifdef POST_EVALUATION
-
-$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/option_table.h
- $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/romstage.c -o $@
- perl -e 's/\.rodata/.rom.data/g' -pi $@
- perl -e 's/\.text/.section .rom.text/g' -pi $@
-
-endif
-
===================================================================
@@ -6,6 +6,7 @@
select SOUTHBRIDGE_INTEL_PXHD
select SOUTHBRIDGE_INTEL_I82801ER
select SUPERIO_NSC_PC87427
+ select ROMCC
select HAVE_PIRQ_TABLE
select HAVE_MP_TABLE
select UDELAY_TSC
===================================================================
@@ -25,6 +25,7 @@
select NORTHBRIDGE_INTEL_I82810
select SOUTHBRIDGE_INTEL_I82801XX
select SUPERIO_SMSC_SMSCSUPERIO
+ select ROMCC
select HAVE_PIRQ_TABLE
select UDELAY_TSC
select BOARD_ROMSIZE_KB_512
===================================================================
@@ -25,6 +25,7 @@
select NORTHBRIDGE_INTEL_I440BX
select SOUTHBRIDGE_INTEL_I82371EB
select SUPERIO_WINBOND_W83977TF
+ select ROMCC
select HAVE_PIRQ_TABLE
select UDELAY_TSC
select BOARD_ROMSIZE_KB_256
===================================================================
@@ -25,6 +25,7 @@
select NORTHBRIDGE_INTEL_I440BX
select SOUTHBRIDGE_INTEL_I82371EB
select SUPERIO_WINBOND_W83977TF
+ select ROMCC
select HAVE_PIRQ_TABLE
select HAVE_MP_TABLE
select SMP
===================================================================
@@ -25,6 +25,7 @@
select NORTHBRIDGE_INTEL_I440BX
select SOUTHBRIDGE_INTEL_I82371EB
select SUPERIO_WINBOND_W83977TF
+ select ROMCC
select HAVE_PIRQ_TABLE
select UDELAY_TSC
select BOARD_ROMSIZE_KB_256
===================================================================
@@ -25,12 +25,3 @@
ldscripts += $(src)/arch/i386/lib/id.lds
ldscripts += $(src)/arch/i386/lib/failover.lds
-ifdef POST_EVALUATION
-
-$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/option_table.h
- $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/romstage.c -o $@
- perl -e 's/\.rodata/.rom.data/g' -pi $@
- perl -e 's/\.text/.section .rom.text/g' -pi $@
-
-endif
-
===================================================================
@@ -25,6 +25,7 @@
select NORTHBRIDGE_INTEL_I440BX
select SOUTHBRIDGE_INTEL_I82371EB
select SUPERIO_WINBOND_W83977TF
+ select ROMCC
select HAVE_PIRQ_TABLE
select HAVE_MP_TABLE
select SMP
===================================================================
@@ -25,6 +25,7 @@
select NORTHBRIDGE_INTEL_I440BX
select SOUTHBRIDGE_INTEL_I82371EB
select SUPERIO_WINBOND_W83977TF
+ select ROMCC
select HAVE_PIRQ_TABLE
select UDELAY_TSC
select BOARD_ROMSIZE_KB_256
===================================================================
@@ -25,6 +25,7 @@
select NORTHBRIDGE_INTEL_I82810
select SOUTHBRIDGE_INTEL_I82801XX
select SUPERIO_SMSC_LPC47B272
+ select ROMCC
select HAVE_PIRQ_TABLE
select UDELAY_TSC
select BOARD_ROMSIZE_KB_512
===================================================================
@@ -43,12 +43,3 @@
ldscripts += $(src)/arch/i386/lib/id.lds
ldscripts += $(src)/arch/i386/lib/failover.lds
-ifdef POST_EVALUATION
-
-$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/option_table.h
- $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/romstage.c -o $@
- perl -e 's/\.rodata/.rom.data/g' -pi $@
- perl -e 's/\.text/.section .rom.text/g' -pi $@
-
-endif
-
===================================================================
@@ -37,12 +37,3 @@
ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb
ldscripts += $(src)/cpu/x86/32bit/entry32.lds
-ifdef POST_EVALUATION
-
-$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/option_table.h
- $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/romstage.c -o $@
- perl -e 's/\.rodata/.rom.data/g' -pi $@
- perl -e 's/\.text/.section .rom.text/g' -pi $@
-
-endif
-
===================================================================
@@ -49,6 +49,10 @@
default n if TINY_BOOTBLOCK
default y
+config ROMCC
+ bool
+ default n
+
config BOOTBLOCK_NORTHBRIDGE_INIT
string
===================================================================
@@ -66,8 +66,29 @@
ifeq ($(crt0s),)
$(error crt0s are empty. If your board still uses crt0-y and ldscript-y: It shouldn't, we moved away from that in r5065)
endif
+
+OPTION_TABLE_H:=
+ifeq ($(CONFIG_HAVE_OPTION_TABLE),y)
+OPTION_TABLE_H:=$(obj)/option_table.h
endif
+ifeq ($(CONFIG_ROMCC),y)
+ROMCCFLAGS ?= -mcpu=p2 -O2
+
+$(obj)/mainboard/$(MAINBOARDDIR)/failover.inc: $(obj)/romcc $(src)/arch/i386/lib/failover.c
+ $(obj)/romcc $(ROMCCFLAGS) --label-prefix=failover $(INCLUDES) $(src)/arch/i386/lib/failover.c -o $@
+
+$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/romcc $(OPTION_TABLE_H) $(obj)/build.h
+ $(obj)/romcc $(ROMCCFLAGS) $(INCLUDES) $< -o $@
+
+else
+$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(OPTION_TABLE_H) $(obj)/build.h
+ $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $< -o $@
+ perl -e 's/\.rodata/.rom.data/g' -pi $@
+ perl -e 's/\.text/.section .rom.text/g' -pi $@
+endif
+endif
+
ifeq ($(CONFIG_TINY_BOOTBLOCK),y)
include $(src)/arch/i386/Makefile.tinybootblock.inc
else
Hi, attached patch moves all the copies of the romstage.inc rule to src/arch/i386/Makefile.inc For that to work, I had to: - Add a CONFIG_ROMCC variable - Set that variable on all ROMCC boards - conditionally choose romcc or gcc rule based on that variable - remove those two rules from all the boards' Makefiles - switch a couple of boards to HAVE_OPTION_TABLE, as they actually have. I also removed the duplication of rules with the sole difference of if they depend on option_table.h or not. Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>