Patchwork add support for win-ent pl-6064/65

login
register
about
Submitter Anish Patel
Date 2010-02-11 17:06:41
Message ID <4B743921.4080505@gmail.com>
Download mbox | patch
Permalink /patch/909/
State Superseded
Headers show

Comments

Anish Patel - 2010-02-11 17:06:41
see patch

---
added w83627hf_set_16_bit_addr_qual() to w83627_early_serial.c
   Reason: Enabled by default on PL-6064 with stock BIOS
   	   not sure if this needs to be in early_serial
	   or early_init
added w83627hf_set_clksel_48() to w83627_early_serial.c
   Reason: The Win Ent platforms are using the 83627HG part, this 
           part does not appear to enable 48MHz clock by default 
	   as claimed in the datasheet.
Added support for Win Enterprises PL-6064/64 platforms

Signed-off-by: Anish K Patel <anishp@win-ent.com>
Uwe Hermann - 2010-02-14 16:18:39
Hi,

On Thu, Feb 11, 2010 at 12:06:41PM -0500, Anish Patel wrote:
> added w83627hf_set_clksel_48() to w83627_early_serial.c
>    Reason: The Win Ent platforms are using the 83627HG part, this 
>            part does not appear to enable 48MHz clock by default 
> 	   as claimed in the datasheet.

Thanks, committed in r5125.

 
> added w83627hf_set_16_bit_addr_qual() to w83627_early_serial.c
>    Reason: Enabled by default on PL-6064 with stock BIOS
>    	   not sure if this needs to be in early_serial
> 	   or early_init

I didn't commit this part for now, not sure what it does exactly,
the datasheets doesn't seem to have very much information here.
Can you confirm that this setting is required on your board? What
happens if you don't set this bit? Doesn't boot anymore? Serial not
working? Other effects? If there are no drawbacks I'd rather not commit
this, unless we know it serves a purpose (and which).


Uwe.
Anish Patel - 2010-02-16 19:21:01
On 02/14/10 11:18, Uwe Hermann wrote:
> Hi,
>
> On Thu, Feb 11, 2010 at 12:06:41PM -0500, Anish Patel wrote:
>   
>> added w83627hf_set_clksel_48() to w83627_early_serial.c
>>    Reason: The Win Ent platforms are using the 83627HG part, this 
>>            part does not appear to enable 48MHz clock by default 
>> 	   as claimed in the datasheet.
>>     
> Thanks, committed in r5125.
>
>  
>   
>> added w83627hf_set_16_bit_addr_qual() to w83627_early_serial.c
>>    Reason: Enabled by default on PL-6064 with stock BIOS
>>    	   not sure if this needs to be in early_serial
>> 	   or early_init
>>     
> I didn't commit this part for now, not sure what it does exactly,
> the datasheets doesn't seem to have very much information here.
> Can you confirm that this setting is required on your board? What
> happens if you don't set this bit? Doesn't boot anymore? Serial not
> working? Other effects? If there are no drawbacks I'd rather not commit
> this, unless we know it serves a purpose (and which).
>
>
> Uwe.
>   
I will see if i can't get the information from my BIOS engineers when
they get back from chinese new year.
But seeing as this bit is enabled by default on the stock BIOS,
disabling could have unknown consquences as of now.
Would it be ok to move it out of the early_serial and in to the normal
w83627 file?

Thanks

Patch

Index: src/superio/winbond/w83627hf/w83627hf_early_serial.c
===================================================================
--- src/superio/winbond/w83627hf/w83627hf_early_serial.c	(revision 5117)
+++ src/superio/winbond/w83627hf/w83627hf_early_serial.c	(working copy)
@@ -4,6 +4,7 @@ 
  * Copyright (C) 2000 AG Electronics Ltd.
  * Copyright (C) 2003-2004 Linux Networx
  * Copyright (C) 2004 Tyan By LYH change from PC87360
+ * Copyright (C) 2010 Win Enterprises (anishp@win-ent.com)
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License as published by
@@ -36,6 +37,26 @@ 
 	outb(0xaa, port);
 }
 
+static void w83627hf_set_clksel_48(device_t dev)
+{
+      unsigned port = dev >> 8;
+      pnp_enter_ext_func_mode(dev);
+      outb(0x24, port);
+      /* set clk input to 48MHz */
+      outb(inb(port + 1) | 0x40, port + 1);
+      pnp_exit_ext_func_mode(dev);
+}
+
+static void w83627hf_16_bit_addr_qual(device_t dev)
+{
+      unsigned port = dev >> 8;
+      pnp_enter_ext_func_mode(dev);
+      outb(0x24, port);
+      /* enable 16 bit address qualification */
+      outb(inb(port + 1) | 0x80, port + 1);
+      pnp_exit_ext_func_mode(dev);
+}
+
 static void w83627hf_enable_serial(device_t dev, unsigned iobase)
 {
 	pnp_enter_ext_func_mode(dev);
Index: src/mainboard/Kconfig
===================================================================
--- src/mainboard/Kconfig	(revision 5117)
+++ src/mainboard/Kconfig	(working copy)
@@ -94,6 +94,8 @@ 
 	bool "Tyan"
 config VENDOR_VIA
 	bool "VIA"
+config VENDOR_WINENT
+	bool "Win Enterprises"
 
 endchoice
 
@@ -352,6 +354,11 @@ 
 	default 0x1019
 	depends on VENDOR_VIA
 
+config MAINBOARD_VENDOR
+	string
+	default "Win Enterprise"
+	depends on VENDOR_WINENT
+
 source "src/mainboard/a-trend/Kconfig"
 source "src/mainboard/abit/Kconfig"
 source "src/mainboard/advantech/Kconfig"
@@ -397,6 +404,7 @@ 
 source "src/mainboard/thomson/Kconfig"
 source "src/mainboard/tyan/Kconfig"
 source "src/mainboard/via/Kconfig"
+source "src/mainboard/winent/Kconfig"
 
 config BOARD_ROMSIZE_KB_128
 	bool