Patchwork ICH6-ICH10 flash decode debug, IDSEL=0 hardcode

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Submitter Carl-Daniel Hailfinger
Date 2009-08-06 17:38:36
Message ID <4A7B151C.3050605@gmx.net>
Download mbox | patch
Permalink /patch/91/
State Superseded
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Comments

Carl-Daniel Hailfinger - 2009-08-06 17:38:36
Add ICH6,ICH7,ICH8,ICH9,ICH10 FWH IDSEL settings and flash decode
settings to the debug output. This can help debug cases where the BIOS
does not set up a correct flash decode for the given flash size.
The Intel docs state that the decode applies to FWH and SPI flash.

Hardcode IDSEL=0 for the top 8 MB for now.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Stefan Reinauer - 2009-08-06 17:50:17
On 06.08.2009, at 19:38, Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net 
 > wrote:

> Add ICH6,ICH7,ICH8,ICH9,ICH10 FWH IDSEL settings and flash decode
> settings to the debug output. This can help debug cases where the BIOS
> does not set up a correct flash decode for the given flash size.
> The Intel docs state that the decode applies to FWH and SPI flash.
>
> Hardcode IDSEL=0 for the top 8 MB for now.
>
> Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net 
> >
>
>



> +    printf("\nSetting IDSEL=0 for top 8 MB");
> +    pci_write_word(dev, 0xd0, 0x00000000);

Is this supposed to be a 16bit or 32bit write?

>    return enable_flash_ich(dev, name, 0xdc);
> }
>

Stefan

Patch

Index: flashrom-ich6_fwh_idsel_debug/chipset_enable.c
===================================================================
--- flashrom-ich6_fwh_idsel_debug/chipset_enable.c	(Revision 670)
+++ flashrom-ich6_fwh_idsel_debug/chipset_enable.c	(Arbeitskopie)
@@ -192,11 +192,45 @@ 
 
 static int enable_flash_ich_4e(struct pci_dev *dev, const char *name)
 {
+	/*
+	 * Note: ICH5 has registers similar to FWH_SEL1, FWH_SEL2 and
+	 * FWH_DEC_EN1, but they are called FB_SEL1, FB_SEL2, FB_DEC_EN1 and
+	 * FB_DEC_EN2.
+	 */
 	return enable_flash_ich(dev, name, 0x4e);
 }
 
 static int enable_flash_ich_dc(struct pci_dev *dev, const char *name)
 {
+	uint32_t fwh_conf;
+	int i;
+
+	/* Ignore all legacy ranges below 1 MB. */
+	/* FWH_SEL1 */
+	fwh_conf = pci_read_long(dev, 0xd0);
+	for (i = 7; i >= 0; i--)
+		printf_debug("\n0xff%02x0000/0xff%02x0000 FWH IDSEL: 0x%x, ",
+			     i * 0x8 + 0xc0, i * 0x8 + 0x80,
+			     (fwh_conf >> (i * 4)) & 0xf);
+	/* FWH_SEL2 */
+	fwh_conf = pci_read_word(dev, 0xd4);
+	for (i = 3; i >= 0; i--)
+		printf_debug("\n0xff%02x0000/0xff%02x0000 FWH IDSEL: 0x%x, ",
+			     i * 0x10 + 0x40, i * 0x10,
+			     (fwh_conf >> (i * 4)) & 0xf);
+	/* FWH_DEC_EN1 */
+	fwh_conf = pci_read_word(dev, 0xd8);
+	for (i = 7; i >= 0; i--)
+		printf_debug("0xff%02x0000/0xff%02x0000 FWH decode %sabled, ",
+			     i * 0x8 + 0xc0, i * 0x8 + 0x80,
+			     (fwh_conf >> (i + 0x8)) & 0x1 ? "en" : "dis");
+	for (i = 3; i >= 0; i--)
+		printf_debug("0xff%02x0000/0xff%02x0000 FWH decode %sabled, ",
+			     i * 0x10 + 0x40, i * 0x10,
+			     (fwh_conf >> i) & 0x1 ? "en" : "dis");
+	/* Gross unmergeable hack to pick IDSEL=0 for top 8 MB */
+	printf("\nSetting IDSEL=0 for top 8 MB");
+	pci_write_word(dev, 0xd0, 0x00000000);
 	return enable_flash_ich(dev, name, 0xdc);
 }