From patchwork Wed Feb 24 07:16:22 2010
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Subject: AMD HT link frequency limit configuration patch
Date: Wed, 24 Feb 2010 07:16:22 -0000
From: tpearson@raptorengineeringinc.com
X-Patchwork-Id: 963
Message-Id: <45318.192.168.1.101.1266995782.squirrel@vali.starlink.edu>
To: coreboot@coreboot.org

This patch allows the user to select a maximum HyperTransport link frequency.

Speed capping is required for maximum stability when attempting to use new
HT3 CPUs on older HT1 mainboards, as the physical inter-CPU traces on the
mainboard may not be able to reliably handle the faster HT3 link
frequency.

---
Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com>

Timothy Pearson
Raptor Engineering

Index: h3finit.c
===================================================================
--- src/northbridge/amd/amdht/h3finit.c	(revision 5119)
+++ src/northbridge/amd/amdht/h3finit.c	(working copy)
@@ -1327,7 +1327,25 @@
 
 	for (i = 0; i < pDat->TotalLinks*2; i += 2)
 	{
-		cbPCBFreqLimit = 0xFFFF;
+#if CONFIG_LIMIT_HT_SPEED_200
+		cbPCBFreqLimit = 0x0001;		// 200MHz
+#elif CONFIG_LIMIT_HT_SPEED_400
+		cbPCBFreqLimit = 0x0003;		// 400MHz
+#elif CONFIG_LIMIT_HT_SPEED_600
+		cbPCBFreqLimit = 0x0007;		// 600MHz
+#elif CONFIG_LIMIT_HT_SPEED_800
+		cbPCBFreqLimit = 0x000F;		// 800MHz
+#elif CONFIG_LIMIT_HT_SPEED_1000
+		cbPCBFreqLimit = 0x001F;		// 1.0GHz
+#elif CONFIG_LIMIT_HT_SPEED_1200
+		cbPCBFreqLimit = 0x003F;		// 1.2GHz
+#elif CONFIG_LIMIT_HT_SPEED_1400
+		cbPCBFreqLimit = 0x007F;		// 1.4GHz
+#elif CONFIG_LIMIT_HT_SPEED_1600
+		cbPCBFreqLimit = 0x00FF;		// 1.6GHz
+#else
+		cbPCBFreqLimit = 0xFFFF;		// Maximum allowed by autoconfiguration
+#endif
 		cbPCBABDownstreamWidth = 16;
 		cbPCBBAUpstreamWidth = 16;