From patchwork Wed Feb 24 19:30:33 2010
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Subject: AMD HT link frequency limit configuration patch
Date: Wed, 24 Feb 2010 19:30:33 -0000
From: tpearson@raptorengineeringinc.com
X-Patchwork-Id: 968
Message-Id: <50697.131.156.220.35.1267039833.squirrel@www.pearsoncomputing.net>
To: coreboot@coreboot.org

Here is a new patch that utilizes KConfig in expert mode.  Also, the HT
width is now configurable as well.

This patch is critical for the MSI MS-9652 mainboard and Barcelona CPUs;
without limiting the HT link the system was completely unstable due to bad
PCB layout.
Acked-by: Patrick Georgi <patrick.georgi@coresystems.de>

---
Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com>

Timothy Pearson
Raptor Engineering

Index: src/Kconfig
===================================================================
--- src/Kconfig	(revision 5158)
+++ src/Kconfig	(working copy)
@@ -56,6 +56,78 @@
 comment "CPU"
 source src/cpu/Kconfig
 comment "Northbridge"
+
+menu "HyperTransport Setup"
+	depends on (NORTHBRIDGE_AMD_AMDK8 || NORTHBRIDGE_AMD_AMDFAM10) && EXPERT
+
+choice
+	prompt "HyperTransport Frequency"
+	default LIMIT_HT_SPEED_AUTO
+	help
+	  This option sets the maximum permissible HyperTransport link frequency.
+	  Use of this option will only limit the autodetected HT frequency; it will not (and cannot) increase the frequency beyond the autodetected limits.
+	  This is primarily used to work around poorly designed or laid out HT traces on certain motherboards.
+
+config LIMIT_HT_SPEED_200
+	bool "Limit HT frequency to 200MHz"
+config LIMIT_HT_SPEED_400
+	bool "Limit HT frequency to 400MHz"
+config LIMIT_HT_SPEED_600
+	bool "Limit HT frequency to 600MHz"
+config LIMIT_HT_SPEED_800
+	bool "Limit HT frequency to 800MHz"
+config LIMIT_HT_SPEED_1000
+	bool "Limit HT frequency to 1.0GHz"
+config LIMIT_HT_SPEED_1200
+	bool "Limit HT frequency to 1.2GHz"
+config LIMIT_HT_SPEED_1400
+	bool "Limit HT frequency to 1.4GHz"
+config LIMIT_HT_SPEED_1600
+	bool "Limit HT frequency to 1.6GHz"
+config LIMIT_HT_SPEED_1800
+        bool "Limit HT frequency to 1.6GHz"
+config LIMIT_HT_SPEED_2000
+        bool "Limit HT frequency to 2.0GHz"
+config LIMIT_HT_SPEED_2200
+        bool "Limit HT frequency to 2.2GHz"
+config LIMIT_HT_SPEED_2400
+        bool "Limit HT frequency to 2.4GHz"
+config LIMIT_HT_SPEED_2600
+        bool "Limit HT frequency to 2.6GHz"
+config LIMIT_HT_SPEED_AUTO
+	bool "Autodetect HT frequency"
+endchoice
+
+choice
+	prompt "HyperTransport Downlink Width"
+	default LIMIT_HT_DOWN_WIDTH_16
+	help
+	  This option sets the maximum permissible HyperTransport link width.
+	  Use of this option will only limit the autodetected HT width; it will not (and cannot) increase the width beyond the autodetected limits.
+	  This is primarily used to work around poorly designed or laid out HT traces on certain motherboards.
+
+config LIMIT_HT_DOWN_WIDTH_8
+	bool "8 bits"
+config LIMIT_HT_DOWN_WIDTH_16
+	bool "16 bits"
+endchoice
+
+choice
+	prompt "HyperTransport Uplink Width"
+	default LIMIT_HT_UP_WIDTH_16
+	help
+	  This option sets the maximum permissible HyperTransport link width.
+	  Use of this option will only limit the autodetected HT width; it will not (and cannot) increase the width beyond the autodetected limits.
+	  This is primarily used to work around poorly designed or laid out HT traces on certain motherboards.
+
+config LIMIT_HT_UP_WIDTH_8
+	bool "8 bits"
+config LIMIT_HT_UP_WIDTH_16
+	bool "16 bits"
+endchoice
+
+endmenu
+
 source src/northbridge/Kconfig
 comment "Southbridge"
 source src/southbridge/Kconfig
Index: src/northbridge/amd/amdht/h3finit.c
===================================================================
--- src/northbridge/amd/amdht/h3finit.c	(revision 5158)
+++ src/northbridge/amd/amdht/h3finit.c	(working copy)
@@ -1327,9 +1327,51 @@
 
 	for (i = 0; i < pDat->TotalLinks*2; i += 2)
 	{
-		cbPCBFreqLimit = 0xFFFF;
+#if CONFIG_LIMIT_HT_SPEED_200
+		cbPCBFreqLimit = 0x0001;
+#elif CONFIG_LIMIT_HT_SPEED_300
+		cbPCBFreqLimit = 0x0003;
+#elif CONFIG_LIMIT_HT_SPEED_400
+		cbPCBFreqLimit = 0x0007;
+#elif CONFIG_LIMIT_HT_SPEED_500
+		cbPCBFreqLimit = 0x000F;
+#elif CONFIG_LIMIT_HT_SPEED_600
+		cbPCBFreqLimit = 0x001F;
+#elif CONFIG_LIMIT_HT_SPEED_800
+		cbPCBFreqLimit = 0x003F;
+#elif CONFIG_LIMIT_HT_SPEED_1000
+		cbPCBFreqLimit = 0x007F;
+#elif CONFIG_LIMIT_HT_SPEED_1200
+		cbPCBFreqLimit = 0x00FF;
+#elif CONFIG_LIMIT_HT_SPEED_1400
+		cbPCBFreqLimit = 0x01FF;
+#elif CONFIG_LIMIT_HT_SPEED_1600
+		cbPCBFreqLimit = 0x03FF;
+#elif CONFIG_LIMIT_HT_SPEED_1800
+		cbPCBFreqLimit = 0x07FF;
+#elif CONFIG_LIMIT_HT_SPEED_2000
+		cbPCBFreqLimit = 0x0FFF;
+#elif CONFIG_LIMIT_HT_SPEED_2200
+		cbPCBFreqLimit = 0x1FFF;
+#elif CONFIG_LIMIT_HT_SPEED_2400
+		cbPCBFreqLimit = 0x3FFF;
+#elif CONFIG_LIMIT_HT_SPEED_2600
+		cbPCBFreqLimit = 0x7FFF;
+#else
+		cbPCBFreqLimit = 0xFFFF;		// Maximum allowed by autoconfiguration
+#endif
+
+#if CONFIG_LIMIT_HT_DOWN_WIDTH_8
+		cbPCBABDownstreamWidth = 8;
+#else
 		cbPCBABDownstreamWidth = 16;
+#endif
+
+#if CONFIG_LIMIT_HT_UP_WIDTH_8
+		cbPCBBAUpstreamWidth = 8;
+#else
 		cbPCBBAUpstreamWidth = 16;
+#endif
 
 		if ( (pDat->PortList[i].Type == PORTLIST_TYPE_CPU) && (pDat->PortList[i+1].Type == PORTLIST_TYPE_CPU))
 		{